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DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://iverilog.icarus.com/
IUSE=examples
KEYWORDS=~amd64 ~ppc ~sparc ~x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.7.tar.gz
_eclasses_=epatch 8233751dc5105a6ae8fcd86ce2bb0247 estack 43ddf5aaffa7a8d0482df54d25a66a1f eutils 227b041a120d309fdefbebb3b8c1dfa9 ltprune 2770eed66a9b8ef944714cd0e968182e multilib 97f470f374f2e94ccab04a2fb21d811e toolchain-funcs 185a06792159ca143528e7010368e8af
_md5_=34bee9fd3fb9d2f5eceed4870d1f757c
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