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-rw-r--r--sci-libs/miopen/Manifest5
-rw-r--r--sci-libs/miopen/files/miopen-5.0.2-gfx1031.patch241
-rw-r--r--sci-libs/miopen/files/miopen-5.0.2-no-strip.patch18
-rw-r--r--sci-libs/miopen/files/miopen-5.0.2-strip-xnack-in-flags.patch20
-rw-r--r--sci-libs/miopen/miopen-5.0.2.ebuild81
5 files changed, 365 insertions, 0 deletions
diff --git a/sci-libs/miopen/Manifest b/sci-libs/miopen/Manifest
index eab02baef5f1..5526cc592151 100644
--- a/sci-libs/miopen/Manifest
+++ b/sci-libs/miopen/Manifest
@@ -4,6 +4,11 @@ AUX miopen-4.3.0-enable-test.patch 1046 BLAKE2B a9a103eee9b3b6890c02349f36dba7c4
AUX miopen-4.3.0-fix-interface-include-in-HIP_COMPILER_FLAGS.patch 954 BLAKE2B 11f260c1ab9dd1569cf25363626e6431615f8853f334b0123d82b0e3404dcdb1b4ecd9e26658e2f39e4fa6a15ba672cb6940b0279e0ef22535e46992721fd060 SHA512 28724e7e1c1de5cee2d18b6c3da76fa857f95aee64a286262c8426149787f62d07f4a3892472cef91d3c091ec53c7f474a70616ce63e5fbbb4c531ed2ab91a50
AUX miopen-4.3.0-no-strip.patch 530 BLAKE2B 7706c0cfb7497a116f1a8a30735615254c907b6a11af243aa2d4945c54fdfb117d6196f0b1fa38163d00d8c7313653cec6342464bde9bf120ccfaf1d795aa374 SHA512 feb4181dbde51a41702450ae7f09231d6a24d94d4a93085250ae07c511d24f45b0149e78ee782b222b6a76e7cfde920598084188a6bcc634875b0fc5979bb708
AUX miopen-4.3.0-strip-xnack-in-flags.patch 1032 BLAKE2B 6cd0d65676edd394e8b8e06c3ec2a7e7bd16888c81f017f1608db7f658166c6354afc26eb71f70f1a94191ed49a87bc17263ef57b61c74bbace82a51e5dc11ec SHA512 d266707d57b7d05124e808c7ba10d7487a6c07a38285927270eb117422c761e3e382a56401a5f1527177e62fb43fe280e365c823969079842766b345dc0b5747
+AUX miopen-5.0.2-gfx1031.patch 11488 BLAKE2B 25b3136015309e8a06de6fcac7864f90d146beb50674db9810ed568b1ff1e8a761bf3a2a96f74ca4e215c1c670df0fcf09bb60c51d54122a063c8c8ee4059ebf SHA512 ebc1fb32aeef147366440e4ded002a833cc2f7b621b5cb2059ec5b3cc5786167c3f5955d04b0e6e3d9cfab86fe6f414e2e74a15db0090429fd97be3671c7445c
+AUX miopen-5.0.2-no-strip.patch 670 BLAKE2B 20a9c14b5df7d1d964ade240fc5c77ff3d119bded10f3b60e6bb17b98db116d3b7e954a6fb9ff6b5bf47243ca0e2c6160e63f27113a0663ee62eeac438c50f8d SHA512 342238b750bdf8210ccb6fc2e4839ce8d236efeec8bbf23b8fb70b0e31027aac39a8f443f0a38835d59365bc9d55bb0ecb210695c9c6488cd8e765c42754b674
+AUX miopen-5.0.2-strip-xnack-in-flags.patch 1205 BLAKE2B d1ba065387050b51288dba37631adea42398b2f7cd8b604e5c305d3491fb661dce8c448e31db42c70f8b6e4dec84c4214ce869dd1419eb67c2ea4c33f18849b5 SHA512 ad32335831c7d1057b53469aa2d1f8f3366b23ccdc71cb7e9a4e7813e7da7e9bb73e62465f1086391653538ccbab2f662baf2446e10e8dbc0f0db631d7368a4d
DIST MIOpen-4.3.0.tar.gz 59405686 BLAKE2B fe91bd91a74023866883d6d0a2a8071a8fe40c4cff2fb4ef58fc6e343a05ac2a731f73e657f4d183ade4e5b7c1fbbe41f3f032918f6e50cb713073aee8d97dc5 SHA512 a8615b7738acfbc7f68d9417b0746c62630d2b48fb8485fafba4db65a4b277a8230f601d249d7e54f89ba25c14176429ca76ad8365a437b09d836b031b0c4fbb
+DIST MIOpen-5.0.2.tar.gz 76294827 BLAKE2B 7b2a1f0e675793aee4a0fa2a270caac8332cda36c8f04cee483cc2882ed987b6e676e9c24a1acf4976a16a10f922b1a6263470b419aa88a29cfcb6d6d4b4cc29 SHA512 a581b45220797904db3e4dd3840f2ef96085f00baf8187c5ab574325a66da4f599dee6496457bb1cc32825b57a13fb0ef35a2ef1bd2a5f449c7e7b9fa64b27d1
EBUILD miopen-4.3.0.ebuild 2207 BLAKE2B 832fd084293d879ed5e71ff61c4c68fc268c38bbae73498355029e7d7e555ed1e216e9177f48fcd3bcdea8ff88a90cbc43c15663f9fcb9ed89fb4e2eada4aa26 SHA512 1a87523a8ee9fd56eee6c7936d28ef8cd6ec491c20a0cfdcba638b820b88f708de5c6add56fee9b08930537c5c7c5eb9c354bf2fc3d8d2f6ce51c599c71fee39
+EBUILD miopen-5.0.2.ebuild 2228 BLAKE2B 7a1c18be68ff73b09fd7f0f22ad868462d7ab35c25f32ca939cb79ebb8726a80f9187611a50eb6b1c806908e438b6e174064dd19544cede5b26cb6aa6c684fed SHA512 f3c49585ad9ca9374bfc28007466a9a787bc0945acd64c09adfe3b686a6d440fb269cc8d76b2ce48893a9ea817617d6a50739610e366ed9a50d97d7717d5c321
MISC metadata.xml 453 BLAKE2B 4c1e76cbc277e93a92a95cda405973cc72863882ab9a6729a07976e7815119e985688387c14fc5017fd6e85aaa64eaa72b900375c7f7428eb6bbb2569c5ecaa6 SHA512 0e42066a5ac8720d1b561bcf23269013d9cceff52a9ddd6a6e0af58c7d2628c335bb290e0dc6c262a0542e286f54fd07cb487dd908343fac5cfca07410df6e56
diff --git a/sci-libs/miopen/files/miopen-5.0.2-gfx1031.patch b/sci-libs/miopen/files/miopen-5.0.2-gfx1031.patch
new file mode 100644
index 000000000000..15ac67bd3cef
--- /dev/null
+++ b/sci-libs/miopen/files/miopen-5.0.2-gfx1031.patch
@@ -0,0 +1,241 @@
+Index: MIOpen-rocm-5.0.2/src/include/miopen/solver/implicitgemm_util.hpp
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/include/miopen/solver/implicitgemm_util.hpp
++++ MIOpen-rocm-5.0.2/src/include/miopen/solver/implicitgemm_util.hpp
+@@ -478,7 +478,7 @@ static inline bool is_use_amd_buffer_loa
+ {
+ #if WORKAROUND_MIOPEN_ISSUE_557
+ const auto device_name = ctx.GetStream().GetDeviceName();
+- return !StartsWith(device_name, "gfx1030");
++ return !StartsWith(device_name, "gfx1030") && !StartsWith(device_name, "gfx1031");
+ #else
+ return true;
+ #endif
+@@ -487,7 +487,7 @@ static inline bool is_use_amd_buffer_loa
+ static inline bool is_use_v_fmac_f32(const ConvolutionContext& ctx)
+ {
+ const auto device_name = ctx.GetStream().GetDeviceName();
+- return StartsWith(device_name, "gfx1030");
++ return StartsWith(device_name, "gfx1030") || StartsWith(device_name, "gfx1031");
+ }
+
+ static inline bool support_amd_buffer_atomic_fadd(const std::string& device_name)
+@@ -608,7 +608,8 @@ static inline bool IsComposableKernelSup
+ StartsWith(c.GetStream().GetDeviceName(), "gfx906") ||
+ StartsWith(c.GetStream().GetDeviceName(), "gfx908") ||
+ StartsWith(c.GetStream().GetDeviceName(), "gfx90a") ||
+- StartsWith(c.GetStream().GetDeviceName(), "gfx1030");
++ StartsWith(c.GetStream().GetDeviceName(), "gfx1030")||
++ StartsWith(c.GetStream().GetDeviceName(), "gfx1031");
+ }
+
+ // greatest common divisor, aka highest common factor
+Index: MIOpen-rocm-5.0.2/src/kernels/batchnorm_functions.h
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/kernels/batchnorm_functions.h
++++ MIOpen-rocm-5.0.2/src/kernels/batchnorm_functions.h
+@@ -159,6 +159,10 @@
+ #define MIO_BN_GFX1030 0
+ #endif
+
++#ifndef MIO_BN_GFX1031
++#define MIO_BN_GFX1031 0
++#endif
++
+ #define UNUSED __attribute__((__unused__))
+
+ #if(MIO_BN_VARIANT != 4)
+Index: MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormActivBwdPerAct.cl
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/kernels/MIOpenBatchNormActivBwdPerAct.cl
++++ MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormActivBwdPerAct.cl
+@@ -34,7 +34,7 @@
+ #endif
+
+ #define MIOPEN_USE_AMDGCN 0
+-#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1
++#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1 && MIO_BN_GFX1031 != 1
+ #undef MIOPEN_USE_AMDGCN
+ #define MIOPEN_USE_AMDGCN 1
+ #endif
+Index: MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormActivBwdSpatial.cl
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/kernels/MIOpenBatchNormActivBwdSpatial.cl
++++ MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormActivBwdSpatial.cl
+@@ -32,7 +32,7 @@
+ #endif
+
+ #define MIOPEN_USE_AMDGCN 0
+-#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1
++#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1 && MIO_BN_GFX1031 != 1
+ #undef MIOPEN_USE_AMDGCN
+ #define MIOPEN_USE_AMDGCN 1
+ #endif
+Index: MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormActivFwdTrainSpatial.cl
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/kernels/MIOpenBatchNormActivFwdTrainSpatial.cl
++++ MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormActivFwdTrainSpatial.cl
+@@ -33,7 +33,7 @@
+ #endif
+
+ #define MIOPEN_USE_AMDGCN 0
+-#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1
++#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1 && MIO_BN_GFX1031 != 1
+ #undef MIOPEN_USE_AMDGCN
+ #define MIOPEN_USE_AMDGCN 1
+ #endif
+Index: MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormBwdSpatial.cl
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/kernels/MIOpenBatchNormBwdSpatial.cl
++++ MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormBwdSpatial.cl
+@@ -33,7 +33,7 @@
+ #endif
+
+ #define MIOPEN_USE_AMDGCN 0
+-#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1
++#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1 && MIO_BN_GFX1031 != 1
+ #undef MIOPEN_USE_AMDGCN
+ #define MIOPEN_USE_AMDGCN 1
+ #endif
+Index: MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormFwdTrainSpatial.cl
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/kernels/MIOpenBatchNormFwdTrainSpatial.cl
++++ MIOpen-rocm-5.0.2/src/kernels/MIOpenBatchNormFwdTrainSpatial.cl
+@@ -33,7 +33,7 @@
+ #endif
+
+ #define MIOPEN_USE_AMDGCN 0
+-#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1
++#if defined(__AMDGCN__) && MIO_BN_GFX1030 != 1 && MIO_BN_GFX1031 != 1
+ #undef MIOPEN_USE_AMDGCN
+ #define MIOPEN_USE_AMDGCN 1
+ #endif
+Index: MIOpen-rocm-5.0.2/src/md_graph.cpp
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/md_graph.cpp
++++ MIOpen-rocm-5.0.2/src/md_graph.cpp
+@@ -738,8 +738,8 @@ void FusionMDGraph::InitConv(FusionMDGra
+
+ add_v21_wino("gfx9", {"gfx900", "gfx906", "gfx908", "gfx90a"}, 1);
+ add_v21_wino("gfx9", {"gfx900", "gfx906", "gfx908", "gfx90a"}, 2);
+- add_v21_wino("gfx10", {"gfx1011", "gfx1012", "gfx1030"}, 1);
+- add_v21_wino("gfx10", {"gfx1011", "gfx1012", "gfx1030"}, 2);
++ add_v21_wino("gfx10", {"gfx1011", "gfx1012", "gfx1030", "gfx1031"}, 1);
++ add_v21_wino("gfx10", {"gfx1011", "gfx1012", "gfx1030", "gfx1031"}, 2);
+ }
+ }
+
+Index: MIOpen-rocm-5.0.2/src/ocl/fusionopbiasbnactivocl.cpp
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/ocl/fusionopbiasbnactivocl.cpp
++++ MIOpen-rocm-5.0.2/src/ocl/fusionopbiasbnactivocl.cpp
+@@ -392,7 +392,8 @@ miopenStatus_t BatchNormBwdTrainFusionOp
+ " -DMIO_BN_USESAVED=" + std::to_string(static_cast<int>(true)) +
+ " -DMIO_BN_VARIANT=" + std::to_string(variant) +
+ " -DMIO_BN_CBA_WRITE_INTERMEDIATE=" + std::to_string(0) +
+- " -DMIO_BN_GFX1030=" + ((handle.GetDeviceName() == "gfx1030") ? "1" : "0");
++ " -DMIO_BN_GFX1030=" + ((handle.GetDeviceName() == "gfx1030") ? "1" : "0") +
++ " -DMIO_BN_GFX1031=" + ((handle.GetDeviceName() == "gfx1031") ? "1" : "0");
+
+ compile_config += add;
+ MIOPEN_LOG_I2(add);
+@@ -607,7 +608,8 @@ miopenStatus_t BatchNormFwdTrainFusionOp
+ " -DMIO_SAVE_MEAN_VARIANCE=" + (saveBatchStats ? "1" : "0") +
+ " -DMIO_RUNNING_RESULT=" + ((savePopStats) ? "1" : "0") +
+ " -DMIO_BN_VARIANT=" + std::to_string(variant) +
+- " -DMIO_BN_GFX1030=" + ((handle.GetDeviceName() == "gfx1030") ? "1" : "0");
++ " -DMIO_BN_GFX1030=" + ((handle.GetDeviceName() == "gfx1030") ? "1" : "0") +
++ " -DMIO_BN_GFX1031=" + ((handle.GetDeviceName() == "gfx1031") ? "1" : "0");
+
+ compile_config += add;
+ MIOPEN_LOG_I2(add);
+Index: MIOpen-rocm-5.0.2/src/target_properties.cpp
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/src/target_properties.cpp
++++ MIOpen-rocm-5.0.2/src/target_properties.cpp
+@@ -54,6 +54,7 @@ static std::string GetDeviceNameFromMap(
+ {"Vega10", "gfx900"},
+ {"gfx901", "gfx900"},
+ {"10.3.0 Sienna_Cichlid 18", "gfx1030"},
++ {"10.3.1 Navi_flounder 18", "gfx1031"},
+ };
+
+ const char* const p_asciz = miopen::GetStringEnv(MIOPEN_DEBUG_ENFORCE_DEVICE{});
+Index: MIOpen-rocm-5.0.2/test/CMakeLists.txt
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/test/CMakeLists.txt
++++ MIOpen-rocm-5.0.2/test/CMakeLists.txt
+@@ -37,6 +37,7 @@ option( MIOPEN_TEST_GFX908 "Test on MI10
+ option( MIOPEN_TEST_GFX90A "Test on gfx90a" OFF )
+ option( MIOPEN_TEST_VEGA "Test on Vega10/20 (gfx900, gfx906)" OFF )
+ option( MIOPEN_TEST_GFX1030 "Test on Navi21 (gfx1030)" OFF )
++option( MIOPEN_TEST_GFX1031 "Test on Navi21 (gfx1031)" OFF )
+ option( MIOPEN_TEST_GPU_XNACK_ENABLED "Test as if XNACK mode is enabled" OFF )
+ option( MIOPEN_TEST_CONV Off)
+ option( MIOPEN_TEST_DEEPBENCH Off)
+@@ -74,7 +75,7 @@ endif()
+ # Also we do not detect GPU when target GPU for testing is specified explicitly.
+ set(MIOPEN_TEST_GPU_DETECTION_FAILED FALSE)
+ set(MIOPEN_NO_GPU FALSE)
+-if(NOT (MIOPEN_TEST_VEGA OR MIOPEN_TEST_GFX908 OR MIOPEN_TEST_GFX90A OR MIOPEN_TEST_GFX1030 OR MIOPEN_TEST_HIP_NOGPU))
++if(NOT (MIOPEN_TEST_VEGA OR MIOPEN_TEST_GFX908 OR MIOPEN_TEST_GFX90A OR MIOPEN_TEST_GFX1030 OR MIOPEN_TEST_GFX1031 OR MIOPEN_TEST_HIP_NOGPU))
+ find_program(ROCMINFO
+ NAMES rocminfo
+ PATHS
+@@ -96,6 +97,8 @@ if(NOT (MIOPEN_TEST_VEGA OR MIOPEN_TEST_
+ elseif (NOT ROCMINFO_EXIT_STATUS EQUAL 0)
+ message(WARNING "ROCMINFO FAILED, GPU TYPE UNKNOWN. Manually set respective MIOPEN_TEST_GFX* CMake variable to specify target GPU for testing.")
+ set(MIOPEN_TEST_GPU_DETECTION_FAILED TRUE)
++ elseif(ROCMINFO_OUTPUT MATCHES "gfx1031")
++ set(MIOPEN_TEST_GFX1031 ON)
+ elseif(ROCMINFO_OUTPUT MATCHES "gfx1030")
+ set(MIOPEN_TEST_GFX1030 ON)
+ elseif(ROCMINFO_OUTPUT MATCHES "gfx900|gfx906")
+@@ -122,6 +125,7 @@ message(STATUS "MIOPEN_TEST_VEGA ${MIOPE
+ message(STATUS "MIOPEN_TEST_GFX908 ${MIOPEN_TEST_GFX908}")
+ message(STATUS "MIOPEN_TEST_GFX90A ${MIOPEN_TEST_GFX90A}")
+ message(STATUS "MIOPEN_TEST_GFX1030 ${MIOPEN_TEST_GFX1030}")
++message(STATUS "MIOPEN_TEST_GFX1031 ${MIOPEN_TEST_GFX1031}")
+ message(STATUS "MIOPEN_TEST_GPU_XNACK_ENABLED ${MIOPEN_TEST_GPU_XNACK_ENABLED}")
+ message(STATUS "MIOPEN_TEST_GPU_DETECTION_FAILED ${MIOPEN_TEST_GPU_DETECTION_FAILED}")
+
+@@ -164,10 +168,10 @@ endmacro()
+ set_var_to_condition(WORKAROUND_ISSUE_1187_DEFAULT MIOPEN_TEST_GFX90A AND MIOPEN_TEST_FLOAT)
+ option( WORKAROUND_ISSUE_1187 "" ${WORKAROUND_ISSUE_1187_DEFAULT})
+
+-set_var_to_condition(WORKAROUND_ISSUE_1148_DEFAULT MIOPEN_TEST_GFX1030 AND MIOPEN_TEST_FLOAT)
++set_var_to_condition(WORKAROUND_ISSUE_1148_DEFAULT MIOPEN_TEST_GFX1030 OR MIOPEN_TEST_GFX1031 AND MIOPEN_TEST_FLOAT)
+ option( WORKAROUND_ISSUE_1148 "" ${WORKAROUND_ISSUE_1148_DEFAULT})
+
+-set_var_to_condition(WORKAROUND_ISSUE_1334_DEFAULT MIOPEN_TEST_GFX1030 AND MIOPEN_TEST_FLOAT)
++set_var_to_condition(WORKAROUND_ISSUE_1334_DEFAULT MIOPEN_TEST_GFX1030 OR MIOPEN_TEST_GFX1031 AND MIOPEN_TEST_FLOAT)
+ option( WORKAROUND_ISSUE_1334 "" ${WORKAROUND_ISSUE_1334_DEFAULT})
+
+ set_var_to_condition(WORKAROUND_ISSUE_1317_DEFAULT MIOPEN_TEST_OPENCL)
+@@ -216,7 +220,7 @@ if (MIOPEN_NO_GPU)
+ test_pooling3d test_perfdb)
+ endif()
+
+-if(MIOPEN_TEST_GFX1030)
++if(MIOPEN_TEST_GFX1030 OR MIOPEN_TEST_GFX1031)
+ if(WORKAROUND_ISSUE_1053 AND MIOPEN_TEST_ALL)
+ list(APPEND SKIP_TESTS test_lrn_test)
+ endif()
+@@ -443,7 +447,7 @@ endfunction()
+ # If nothing is specified, the default value is taken.
+ # Default: FLOAT_ENABLED HALF_DISABLED BF16_DISABLED INT8_DISABLED
+ #
+-# GPU types: VEGA, GFX908, GFX90A, GFX1030
++# GPU types: VEGA, GFX908, GFX90A, GFX1030, GFX1031
+ # VEGA tests are intended to be run on gfx900 or gfx906.
+ # The option can be enabled or disabled by using '_ENABLED' and '_DISABLED' suffix.
+ # If nothing is specified, the default value is taken.
+@@ -574,7 +578,7 @@ function(add_custom_test NAME)
+ set_tests_properties(${NAME} PROPERTIES RUN_SERIAL On)
+ endif()
+
+- if( (is_vega_check OR is_gfx908_check OR is_gfx1030_check OR is_gfx90a_check)
++ if( (is_vega_check OR is_gfx908_check OR is_gfx1030_check OR is_gfx1031_check OR is_gfx90a_check)
+ AND is_full_check
+ AND is_xnack_on_check
+ AND (is_miotensile_check AND is_mlir_check)
diff --git a/sci-libs/miopen/files/miopen-5.0.2-no-strip.patch b/sci-libs/miopen/files/miopen-5.0.2-no-strip.patch
new file mode 100644
index 000000000000..a7be67e99578
--- /dev/null
+++ b/sci-libs/miopen/files/miopen-5.0.2-no-strip.patch
@@ -0,0 +1,18 @@
+Don't strip for release. Let portage handle stripping.
+Index: MIOpen-rocm-5.0.2/CMakeLists.txt
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/CMakeLists.txt
++++ MIOpen-rocm-5.0.2/CMakeLists.txt
+@@ -78,12 +78,6 @@ option( BUILD_DEV "Build for development
+ option(MIOPEN_ENABLE_FIN "Enable the fin driver for MIOpen" OFF)
+
+
+-# Strip symbols for release
+-if(NOT WIN32 AND NOT APPLE)
+- set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -s")
+- set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -s")
+-endif()
+-
+ rocm_setup_version(VERSION 2.15.0)
+
+ list( APPEND CMAKE_MODULE_PATH ${PROJECT_SOURCE_DIR}/cmake )
diff --git a/sci-libs/miopen/files/miopen-5.0.2-strip-xnack-in-flags.patch b/sci-libs/miopen/files/miopen-5.0.2-strip-xnack-in-flags.patch
new file mode 100644
index 000000000000..14d2c5b9daa5
--- /dev/null
+++ b/sci-libs/miopen/files/miopen-5.0.2-strip-xnack-in-flags.patch
@@ -0,0 +1,20 @@
+if options like :xnack- exists in ${AMDGPU_TARGETS}, CMakeLists cannot handle HIP_COMPILER_FLAGS well
+
+the original regex replace should include :+- so xnack- is stripped as well. Otherwise clang complation at MIOpen runtime will fail.
+
+Signed-off-by: Yiyang Wu <xgreenlandforwyy@gmail.com>
+Index: MIOpen-rocm-5.0.2/CMakeLists.txt
+===================================================================
+--- MIOpen-rocm-5.0.2.orig/CMakeLists.txt
++++ MIOpen-rocm-5.0.2/CMakeLists.txt
+@@ -198,8 +198,8 @@ find_package(hip REQUIRED PATHS /opt/roc
+ message(STATUS "Build with HIP ${hip_VERSION}")
+ target_flags(HIP_COMPILER_FLAGS hip::device)
+ # Remove cuda arch flags
+-string(REGEX REPLACE --cuda-gpu-arch=[a-z0-9]+ "" HIP_COMPILER_FLAGS "${HIP_COMPILER_FLAGS}")
+-string(REGEX REPLACE --offload-arch=[a-z0-9]+ "" HIP_COMPILER_FLAGS "${HIP_COMPILER_FLAGS}")
++string(REGEX REPLACE --cuda-gpu-arch=[a-z0-9:+-]+ "" HIP_COMPILER_FLAGS "${HIP_COMPILER_FLAGS}")
++string(REGEX REPLACE --offload-arch=[a-z0-9:+-]+ "" HIP_COMPILER_FLAGS "${HIP_COMPILER_FLAGS}")
+ string(REPLACE "$<LINK_LANGUAGE:CXX>" "1" HIP_COMPILER_FLAGS "${HIP_COMPILER_FLAGS}")
+ string(REPLACE "SHELL:" "" HIP_COMPILER_FLAGS "${HIP_COMPILER_FLAGS}")
+
diff --git a/sci-libs/miopen/miopen-5.0.2.ebuild b/sci-libs/miopen/miopen-5.0.2.ebuild
new file mode 100644
index 000000000000..1a75457baec2
--- /dev/null
+++ b/sci-libs/miopen/miopen-5.0.2.ebuild
@@ -0,0 +1,81 @@
+# Copyright 1999-2022 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+inherit cmake flag-o-matic
+
+DESCRIPTION="AMD's Machine Intelligence Library"
+HOMEPAGE="https://github.com/ROCmSoftwarePlatform/MIOpen"
+SRC_URI="https://github.com/ROCmSoftwarePlatform/MIOpen/archive/rocm-${PV}.tar.gz -> MIOpen-${PV}.tar.gz"
+
+LICENSE="MIT"
+KEYWORDS="~amd64"
+SLOT="0/$(ver_cut 1-2)"
+
+IUSE="debug test"
+RESTRICT="!test? ( test )"
+
+RDEPEND="
+ dev-util/hip
+ >=dev-db/sqlite-3.17
+ dev-libs/ocl-icd
+ dev-util/rocm-clang-ocl:${SLOT}
+ sci-libs/rocBLAS:${SLOT}
+ >=dev-libs/boost-1.72
+"
+
+DEPEND="${RDEPEND}"
+
+BDEPEND="dev-libs/half:0/1"
+
+S="${WORKDIR}/MIOpen-rocm-${PV}"
+
+PATCHES=(
+ "${FILESDIR}/${PN}-4.2.0-disable-no-inline-boost.patch"
+ "${FILESDIR}/${PN}-4.2.0-gcc11-numeric_limits.patch"
+ "${FILESDIR}/${PN}-5.0.2-strip-xnack-in-flags.patch"
+ "${FILESDIR}/${PN}-4.3.0-fix-interface-include-in-HIP_COMPILER_FLAGS.patch"
+ "${FILESDIR}/${PN}-4.3.0-enable-test.patch"
+ "${FILESDIR}/${PN}-5.0.2-no-strip.patch"
+ "${FILESDIR}/${PN}-5.0.2-gfx1031.patch"
+)
+
+src_prepare() {
+ sed -e "s:/opt/rocm/llvm:""${EPREFIX}""/usr/lib/llvm/roc/ NO_DEFAULT_PATH:" \
+ -e "s:/opt/rocm/hip:""${EPREFIX}""/usr/lib/hip/ NO_DEFAULT_PATH:" \
+ -e '/set( MIOPEN_INSTALL_DIR/s:miopen:${CMAKE_INSTALL_PREFIX}:' \
+ -e '/MIOPEN_TIDY_ERRORS ALL/d' \
+ -i CMakeLists.txt || die
+
+ sed -e "/rocm_install_symlink_subdir(\${MIOPEN_INSTALL_DIR})/d" -i src/CMakeLists.txt || die
+ sed -e "/add_test/s:--build \${CMAKE_CURRENT_BINARY_DIR}:--build ${BUILD_DIR}:" -i test/CMakeLists.txt || die
+
+ sed -e "s:\${AMD_DEVICE_LIBS_PREFIX}/lib:${EPREFIX}/usr/lib/amdgcn/bitcode:" -i cmake/hip-config.cmake || die
+
+ cmake_src_prepare
+}
+
+src_configure() {
+ if ! use debug; then
+ append-cflags "-DNDEBUG"
+ append-cxxflags "-DNDEBUG"
+ CMAKE_BUILD_TYPE="Release"
+ else
+ CMAKE_BUILD_TYPE="Debug"
+ fi
+
+ export CXX="${EPREFIX}/usr/lib/llvm/roc/bin/clang++"
+
+ local mycmakeargs=(
+ -DCMAKE_SKIP_RPATH=ON
+ -DCMAKE_INSTALL_PREFIX="${EPREFIX}/usr"
+ -DMIOPEN_BACKEND=HIP
+ -DBoost_USE_STATIC_LIBS=OFF
+ -DBUILD_TESTS=$(usex test ON OFF)
+ -DMIOPEN_TEST_ALL=$(usex test ON OFF)
+ ${AMDGPU_TARGETS+-DAMDGPU_TARGETS="${AMDGPU_TARGETS}"}
+ )
+
+ cmake_src_configure
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 18:33:05 +0000