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-rw-r--r--sci-electronics/iverilog/Manifest5
-rw-r--r--sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch97
-rw-r--r--sci-electronics/iverilog/iverilog-10.3.ebuild (renamed from sci-electronics/iverilog/iverilog-10.3-r2.ebuild)28
-rw-r--r--sci-electronics/iverilog/iverilog-11.0.ebuild2
4 files changed, 19 insertions, 113 deletions
diff --git a/sci-electronics/iverilog/Manifest b/sci-electronics/iverilog/Manifest
index 078c3e3c124a..31fdd0001096 100644
--- a/sci-electronics/iverilog/Manifest
+++ b/sci-electronics/iverilog/Manifest
@@ -1,10 +1,9 @@
AUX iverilog-10.3-file-missing.patch 8849 BLAKE2B 2cb72c6d2b769ae0ac601f950b62dd0c3ad460df593a6a033794a5bfa482d1aa18e74502a8f54456c96df86ba12fe61827e0439764d05e0b5d5b00ae1d71d870 SHA512 bb954e9669fdfaea30a9bf711a2d7b5cf38906dc3665752746a9e0d8738dc07a79d90b33ba82dfe665a8181910b3b3083a78d06607562d684f6d9b8bc1741368
AUX iverilog-10.3-fno-common.patch 777 BLAKE2B 99ce15739f0d86dd838e652542152cc7b2301a3dee605b7aff299ef3588576b21ed21ae19468a3dcca200cee4b6cd3271125837d75e83dbed770d07cd2eeb83a SHA512 2e10fbb03649da90e97977b18922fb74527d0256fdd6b819ba69cafe64c3a38f09cf47619448fd34a47a2ebf72af406c18d276885189f2381157ba99c1994319
-AUX iverilog-10.3-gen-bison-header.patch 3125 BLAKE2B 75bd40007237491571e0bbac19cd9d007db5b18b491882f52ca9889ead097189371906a62cebae2176ea822572984f58c97ac6abbef7ee89f2397a06a4580c1f SHA512 ebc835c28456498787a82ff446c606a6713343e4421465a17afeb1266b1dc445c760707059b217ee9efc7e79d00a119fb2173c1adbf3270cdd0ed720e3436d17
AUX iverilog-11.0-autoconf-2.70.patch 11616 BLAKE2B f753698b8dfc21914ac68d09251515f71890e5164252173b020987b1387cccc23ac9d621cb27b5073d654f87cf003a75b9a35d075437201b565f32220e14fc18 SHA512 1a57dfd29799ff2aeeb27632325b9522b9764faaecf223ff7120bf224ebae8cda2beffb5f2b04bfc148e518332680272cc32491e0bcd103c2d0dffd46a37aa0e
DIST iverilog-10.3.tar.gz 1600835 BLAKE2B 107c57c61fb27c18f4020f7853bf6ca83d1a86fdc73c57ea207828baf6b7a26d42e43ce7b33580f050a4c0b8f63bca6accecf678323a3bbbee1eb9c1d8fa2caa SHA512 67076e19a208576c21a0462ff7d15d00a9d47740c47518a5523bd928b3118360d85eb84c317963717d15e5246ece3727259f6ff3baf59e195340530cc9086a1d
DIST iverilog-11.0.tar.gz 1682457 BLAKE2B ba90574e1453a095143e76e5dc79bb2357a721fc62c24f0fb23d220458819cb3b8ea8494410ce956e68831b682b61f27f64e94e9c166a69e5f6d5d30a8269a11 SHA512 5d6a65e1c3b6b62e99af708cd5a259cc69c6b789dd6eff69e225903d9b8c115d9e5d6f7635b30c6558197cd0ee6fd8196a163fbd98956e24c211d97328b85056
-EBUILD iverilog-10.3-r2.ebuild 1785 BLAKE2B 058c19a7d97a4dd06ddae74f5f52d8455b967ca62897ce1306174de02068e20dae8b9fa886d6d9931c448fe38e4e9530d1aac761b1a656403084f0755106025f SHA512 89c9086635765151fbf23c2d1c11c5daca8100d9fef52db681f4124aca10f51cdd8a94885479f98dc541bea583357744952d8ee859c103fcbba48b517acb4442
-EBUILD iverilog-11.0.ebuild 1546 BLAKE2B 86377320cab16df1f7124687dcfd6393035b840709281fd21158acc99ae72a9c4abdd6ef71650dbb9675b327043c295c135e96c0a530a6889807850995cb94ed SHA512 f7a3fb99bac2e1b9e6132e88be42157cd435d5bcb7ab471a42778eead9f068662207e612553b652751f0bb6ea8f8593b25b22a2dae9073f5623ccdb99ab317d6
+EBUILD iverilog-10.3.ebuild 1865 BLAKE2B f3d3828e9d6d5afd7457dbe620450713e7e8e32ed18ee41f36d07eb474bfd979dd5c27b71fdd3a9847cdcec03229586bfd14c170354905573293137ede1853f8 SHA512 4d6d589df25c6f1139f0f24d3d3074c9b7251972d38828d97989806d6f80784049b0b84eaa93f92f24ba3d60499fd612ba32d6443967a7154a197e4a933f3c2d
+EBUILD iverilog-11.0.ebuild 1542 BLAKE2B b8d33c4fbb5e68728005012fa1c3b4463fe8d27a5a0c4faa84093a8729d7e2d3a485d7bc768f468f90c8ae549caeae7ee958bbce142e90bd4b8a5ad9827c94bb SHA512 bfacbf85d2a5d75d8f21fd43a788c8915039d6189a0c56d2b1e5d3015d5f998784627b32bd422042421b0d052c767955dd64ca54d0db9aa1243fbf480896c019
EBUILD iverilog-9999.ebuild 1485 BLAKE2B dd0bc0d262210b821ec7499876d249610762c10f42960f42cf1e4cda3c31d7a65628c2289fff894e5863952415829b940cdcf0031c1bdb61bc65e970cbe2064a SHA512 5a141f14d7752380371ceb40177884e213e0fac779f3cfb358a93d8a5c691c3d2b947d91f394c5365bdce402b611d990d79c7879f6884520f6d96f6806702941
MISC metadata.xml 904 BLAKE2B 92e78cfceee82ffb4feaee92810d496bf78c3321a81c97fbcc0038244e2ea58e87fec57254ebd90852a4d308bd08d944659ce59b339b2762ba26843c8ad59cb3 SHA512 8c3633d7bea101dc771c26355b40d309eb5b0b3ea7bbf3538faaa9c7098253eb623aac3f9e312aed25a9262116d013784adf02d9f2a3943a5fbec3733dab250f
diff --git a/sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch b/sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch
deleted file mode 100644
index 0027184c8338..000000000000
--- a/sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 5b699c1be73e789831db01e779a41478c0c62309 Mon Sep 17 00:00:00 2001
-From: Henner Zeller <h.zeller@acm.org>
-Date: Wed, 29 Jul 2020 15:29:08 -0700
-Subject: [PATCH] Bison includes its generated header in *.cc. Generate with
- correct name.
-
-The current bison (3.7) generates a *.cc file that includes the header
-it generated. For parse.cc this would be parse.hh. Right now, we rename
-this header to have a common name used in other files, but this results
-in a compile error for the parse.cc file:
-
-parse.cc:462:10: fatal error: parse.hh: No such file or directory
- 462 | #include "parse.hh"
- | ^~~~~~~~~~
-
-Fix this by telling bison to output the header file to the correct
-filename in the first place so that we don't have to rename it.
-(using the --defines instead of -d option).
-
-This looks like a bison specific option not available in Posix yacc;
-but looks like we're requiring bison anyway.
-
-Signed-off-by: Henner Zeller <h.zeller@acm.org>
----
- Makefile.in | 4 +---
- tgt-pcb/Makefile.in | 4 +---
- vhdlpp/Makefile.in | 4 +---
- vvp/Makefile.in | 4 +---
- 4 files changed, 4 insertions(+), 12 deletions(-)
-
-diff --git a/Makefile.in b/Makefile.in
-index 5ac5515a..cc8cac46 100644
---- a/Makefile.in
-+++ b/Makefile.in
-@@ -256,10 +256,8 @@ parse.o: parse.cc
-
- # Build this in two steps to avoid parallel build issues (see pr3462585)
- parse.cc: $(srcdir)/parse.y
-- $(YACC) --verbose -t -p VL -d -o $@ $<
-+ $(YACC) --verbose -t -p VL --defines=parse.h -o $@ $<
- parse.h: parse.cc
-- mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
-- touch $@
-
- syn-rules.cc: $(srcdir)/syn-rules.y
- $(YACC) --verbose -t -p syn_ -o $@ $<
-diff --git a/tgt-pcb/Makefile.in b/tgt-pcb/Makefile.in
-index a5f9b7d5..7345e195 100644
---- a/tgt-pcb/Makefile.in
-+++ b/tgt-pcb/Makefile.in
-@@ -89,10 +89,8 @@ fp_lex.cc: $(srcdir)/fp.lex
- $(LEX) -s -ofp_lex.cc $(srcdir)/fp.lex
-
- fp.cc: $(srcdir)/fp.y
-- $(YACC) --verbose -t -p fp -d -o $@ $<
-+ $(YACC) --verbose -t -p fp --defines=fp.h -o $@ $<
- fp.h: fp.cc
-- mv fp.cc.h $@ 2>/dev/null || mv fp.hh $@
-- touch $@
-
- ifeq (@WIN32@,yes)
- TGTLDFLAGS=-L.. -livl
-diff --git a/vhdlpp/Makefile.in b/vhdlpp/Makefile.in
-index 53ae140a..458178bd 100644
---- a/vhdlpp/Makefile.in
-+++ b/vhdlpp/Makefile.in
-@@ -117,10 +117,8 @@ lexor.cc: $(srcdir)/lexor.lex
-
- # Build this in two steps to avoid parallel build issues (see pr3462585)
- parse.cc: $(srcdir)/parse.y
-- $(YACC) --verbose -t -d -o $@ $<
-+ $(YACC) --verbose -t --defines=parse.h -o $@ $<
- parse.h: parse.cc
-- mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
-- touch $@
-
- lexor_keyword.o: lexor_keyword.cc parse.h
-
-diff --git a/vvp/Makefile.in b/vvp/Makefile.in
-index 8ccdb1d2..cdd940f5 100644
---- a/vvp/Makefile.in
-+++ b/vvp/Makefile.in
-@@ -142,10 +142,8 @@ tables.o: tables.cc
-
- # Build this in two steps to avoid parallel build issues (see pr3462585)
- parse.cc: $(srcdir)/parse.y
-- $(YACC) --verbose -t -d -o $@ $<
-+ $(YACC) --verbose -t --defines=parse.h -o $@ $<
- parse.h: parse.cc
-- mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
-- touch $@
-
- lexor.cc: $(srcdir)/lexor.lex
- $(LEX) -s -olexor.cc $(srcdir)/lexor.lex
---
-2.26.2
-
diff --git a/sci-electronics/iverilog/iverilog-10.3-r2.ebuild b/sci-electronics/iverilog/iverilog-10.3.ebuild
index be0e76900950..a2dea488d4fd 100644
--- a/sci-electronics/iverilog/iverilog-10.3-r2.ebuild
+++ b/sci-electronics/iverilog/iverilog-10.3.ebuild
@@ -18,27 +18,31 @@ if [[ ${PV} == "9999" ]] ; then
EGIT_REPO_URI="https://github.com/steveicarus/${PN}.git"
else
SRC_URI="https://github.com/steveicarus/${PN}/archive/v${GITHUB_PV}.tar.gz -> ${P}.tar.gz"
- KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc x86"
+ KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ppc ~ppc64 ~riscv ~s390 sparc x86"
S="${WORKDIR}/${PN}-${GITHUB_PV}"
fi
LICENSE="LGPL-2.1"
SLOT="0"
+IUSE="examples"
-DEPEND="
- sys-libs/readline:=
+# If you are building from git, you will also need gperf to generate
+# the configure scripts.
+RDEPEND="
+ sys-libs/readline:0
sys-libs/zlib
"
-RDEPEND="${DEPEND}"
-BDEPEND="dev-util/gperf
+
+DEPEND="
+ dev-util/gperf
sys-devel/bison
sys-devel/flex
+ ${RDEPEND}
"
PATCHES=(
"${FILESDIR}"/${PN}-10.3-file-missing.patch #705412
"${FILESDIR}"/${PN}-10.3-fno-common.patch #706366
- "${FILESDIR}"/${PN}-10.3-gen-bison-header.patch #734760
)
src_prepare() {
@@ -49,8 +53,7 @@ src_prepare() {
# > sh autoconf.sh
# Autoconf in root ...
- eautoconf
-
+ eautoconf --force
# Precompiling lexor_keyword.gperf
gperf -o -i 7 -C -k 1-4,6,9,\$ -H keyword_hash -N check_identifier -t ./lexor_keyword.gperf > lexor_keyword.cc || die
# Precompiling vhdlpp/lexor_keyword.gperf
@@ -60,12 +63,13 @@ src_prepare() {
src_install() {
local DOCS=( *.txt )
-
# Default build fails with parallel jobs,
# https://github.com/steveicarus/iverilog/pull/294
- emake installdirs DESTDIR="${ED}"
+ emake installdirs DESTDIR="${D}"
default
- dodoc -r examples
- docompress -x /usr/share/doc/${PF}/examples
+ if use examples; then
+ dodoc -r examples
+ docompress -x /usr/share/doc/${PF}/examples
+ fi
}
diff --git a/sci-electronics/iverilog/iverilog-11.0.ebuild b/sci-electronics/iverilog/iverilog-11.0.ebuild
index 158257d7f0e6..bf530fda8300 100644
--- a/sci-electronics/iverilog/iverilog-11.0.ebuild
+++ b/sci-electronics/iverilog/iverilog-11.0.ebuild
@@ -18,7 +18,7 @@ if [[ ${PV} == "9999" ]] ; then
EGIT_REPO_URI="https://github.com/steveicarus/${PN}.git"
else
SRC_URI="https://github.com/steveicarus/${PN}/archive/v${GITHUB_PV}.tar.gz -> ${P}.tar.gz"
- KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
+ KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ppc ~ppc64 ~riscv ~s390 sparc x86"
S="${WORKDIR}/${PN}-${GITHUB_PV}"
fi