7 files changed, 174 insertions, 144 deletions
diff --git a/sci-electronics/iverilog/Manifest b/sci-electronics/iverilog/Manifest
index 55f90f8e1727..6999189bf3be 100644
--- a/sci-electronics/iverilog/Manifest
+++ b/sci-electronics/iverilog/Manifest
@@ -1,13 +1,9 @@
 AUX iverilog-10.3-file-missing.patch 8849 BLAKE2B 2cb72c6d2b769ae0ac601f950b62dd0c3ad460df593a6a033794a5bfa482d1aa18e74502a8f54456c96df86ba12fe61827e0439764d05e0b5d5b00ae1d71d870 SHA512 bb954e9669fdfaea30a9bf711a2d7b5cf38906dc3665752746a9e0d8738dc07a79d90b33ba82dfe665a8181910b3b3083a78d06607562d684f6d9b8bc1741368
 AUX iverilog-10.3-fno-common.patch 777 BLAKE2B 99ce15739f0d86dd838e652542152cc7b2301a3dee605b7aff299ef3588576b21ed21ae19468a3dcca200cee4b6cd3271125837d75e83dbed770d07cd2eeb83a SHA512 2e10fbb03649da90e97977b18922fb74527d0256fdd6b819ba69cafe64c3a38f09cf47619448fd34a47a2ebf72af406c18d276885189f2381157ba99c1994319
+AUX iverilog-10.3-gen-bison-header.patch 3125 BLAKE2B 75bd40007237491571e0bbac19cd9d007db5b18b491882f52ca9889ead097189371906a62cebae2176ea822572984f58c97ac6abbef7ee89f2397a06a4580c1f SHA512 ebc835c28456498787a82ff446c606a6713343e4421465a17afeb1266b1dc445c760707059b217ee9efc7e79d00a119fb2173c1adbf3270cdd0ed720e3436d17
 DIST iverilog-10.3.tar.gz 1600835 BLAKE2B 107c57c61fb27c18f4020f7853bf6ca83d1a86fdc73c57ea207828baf6b7a26d42e43ce7b33580f050a4c0b8f63bca6accecf678323a3bbbee1eb9c1d8fa2caa SHA512 67076e19a208576c21a0462ff7d15d00a9d47740c47518a5523bd928b3118360d85eb84c317963717d15e5246ece3727259f6ff3baf59e195340530cc9086a1d
-DIST verilog-0.9.6.tar.gz 1219982 BLAKE2B 12f7dfb1ab8b7e4524cf0a3061ce801bfa741015fc1446aef7ffe51c42d76b5d0578e78ce13cd8c3fb6bac580e9da1ed11ca03e1fd02f8cb75dd74425546f851 SHA512 63c18f211eb9711547db65b859551063129cf18acb1196eaa88562f194231079fe929a6f7b8fbe2160863c521f02dde079e792f1b0bbe1c2514deafd55d5288c
-DIST verilog-0.9.7.tar.gz 1238088 BLAKE2B c0b173b4857abc0d35ad05d9f11d5265763c92e625aadb1b487978c40e0679725b8e6de0fc05cc8e4bc7a6db6e1d9abacf886942b05e27d8513b9586cca156f9 SHA512 1a81f132c667f5cd33a11156364a366806ef9b6ef59b86f69df852af79cc92db17df8db0bace4e3c14929b0110df0aa7d83f35f664057e715842acf7bd21c1f5
-DIST verilog-10.2.tar.gz 1695227 BLAKE2B ea2488de55ef60a248e7f5ffd5e06c6d86d57f3cff4536cb64a727ab70d8868847e53beec093e21243a1e81ede021b0ccde771d66ce1d986f737b5d925aaff11 SHA512 21e0861ee994daf0a98d0da3e0ad665e37cba4669faa873ae57d05eb41794b6cc2948c88cc07ebe1e9266850ad2bad189096ae6911b9c4064f772279d0901aef
-EBUILD iverilog-0.9.6.ebuild 1123 BLAKE2B bd804cd0e062aad50ae3d13b86181431634a9ffc5e06f725bd3c3dba8e3cdcdcefe970ac5c5af9dd12bdcf6e6efe45158d8e262c445f155b51bc7289e8f84782 SHA512 b5bfe49d06522810054db72693e30220ceda8e0e1886a45a2094024b6e114cb3c8e943c333308fd0f17facdaa5bf7066aedc33120bed3fbb942ff0320733695a
-EBUILD iverilog-0.9.7.ebuild 1127 BLAKE2B 0df427e1b40eb81301e3ad5a783ba439d11e29f64bba8db1bae0b814807525367a1009b7dd3daad2c04e315c0899b32e6b83fa5c034dc821350151e234546616 SHA512 0166372b9aec56da2edce510783bdd9aece5610f418d0ceea081a72f0b7277b62133fcd866360fea449395a7e9bd6a7f24ae03c2373184bd14c1c951e81d4e33
-EBUILD iverilog-10.2.ebuild 645 BLAKE2B bfa32a5577961ef503b53654f1c076cfe8a1cb000a2986ca603404115502332f6c8be2ca10b925ce70f148ee394bed96c6e4f19c303664cde249de7e9dd8bc43 SHA512 de3c3cb13a45900e02cc90a9283a41f5d32e5a6fb6c9f8e261bd356fbcfafd98fd65e38c42324d246927360a6b1af17c0b9d110b38d6f2ce19921b350a19f905
 EBUILD iverilog-10.3-r1.ebuild 1869 BLAKE2B bda326a2afc4ba27c3fb0331033e3f229f323bb0ae7c73f47c9c00363b18c4c16a9ea942d5c7879c8e22f6bd9b86dc7c37370d384ab31d21168d2128cde37caa SHA512 83a96e9ba2ea8cedb81d0cc2f62226afeacfa6c5104213ac040299161500955212b8f6c70f8d991eb478cdfc62779b3bf264704ab68bd26cbc735b7c35e27c13
+EBUILD iverilog-10.3-r2.ebuild 1787 BLAKE2B 1691ece5e455e1dfd053bb40318b8e6582f995e58c8a7b116fd37c6401bd5a0959c4190560b202bca722c89913b460ea1f0690b504646d249488ce2186aa3302 SHA512 970eb1c579e34da062bff435d426973a746ebc2e4e2f5b7ee9b2fb76a9d573d45ba2185f97b54d1ebf35c72b953bd7a7434a1a35af2a58e17dcc238c8445f9bb
 EBUILD iverilog-10.3.ebuild 1865 BLAKE2B f3d3828e9d6d5afd7457dbe620450713e7e8e32ed18ee41f36d07eb474bfd979dd5c27b71fdd3a9847cdcec03229586bfd14c170354905573293137ede1853f8 SHA512 4d6d589df25c6f1139f0f24d3d3074c9b7251972d38828d97989806d6f80784049b0b84eaa93f92f24ba3d60499fd612ba32d6443967a7154a197e4a933f3c2d
-EBUILD iverilog-9999.ebuild 1752 BLAKE2B d4464c92e2b93d9aea252530a4a8404c241e8f480f35f92545518812e29e7700842dfd53b40fcacc85faea0d979a3bffef353868d97e23d64a65f07455e797ba SHA512 ada646b38252d99af1f025464c8f0e5ee158d2c087015ab603114f7b4eba235df695a4d6bc546f431a6e3e92f4bd87a3868a8bfe9a40c414cf5b49cd871c0a60
+EBUILD iverilog-9999.ebuild 1663 BLAKE2B 639e6e07077819b2f5520f506797c0b43c4bac854221a07b5449869b02a057923d87e6456e6da78059f4c7f76913890ebf5fc69e230dead65fab966686936ac3 SHA512 768983e921a914592b911e034d6c4e4f32a7cab80f00a2ae26041f6eb23a02a177cac4c6e75c75dc3ea1fbee0c9a9d97309afaecb8715ce56f7100a02c09c4f3
 MISC metadata.xml 904 BLAKE2B 92e78cfceee82ffb4feaee92810d496bf78c3321a81c97fbcc0038244e2ea58e87fec57254ebd90852a4d308bd08d944659ce59b339b2762ba26843c8ad59cb3 SHA512 8c3633d7bea101dc771c26355b40d309eb5b0b3ea7bbf3538faaa9c7098253eb623aac3f9e312aed25a9262116d013784adf02d9f2a3943a5fbec3733dab250f
diff --git a/sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch b/sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch
new file mode 100644
index 000000000000..0027184c8338
--- /dev/null
+++ b/sci-electronics/iverilog/files/iverilog-10.3-gen-bison-header.patch
@@ -0,0 +1,97 @@
+From 5b699c1be73e789831db01e779a41478c0c62309 Mon Sep 17 00:00:00 2001
+From: Henner Zeller <h.zeller@acm.org>
+Date: Wed, 29 Jul 2020 15:29:08 -0700
+Subject: [PATCH] Bison includes its generated header in *.cc. Generate with
+ correct name.
+
+The current bison (3.7) generates a *.cc file that includes the header
+it generated. For parse.cc this would be parse.hh. Right now, we rename
+this header to have a common name used in other files, but this results
+in a compile error for the parse.cc file:
+
+parse.cc:462:10: fatal error: parse.hh: No such file or directory
+  462 | #include "parse.hh"
+      |          ^~~~~~~~~~
+
+Fix this by telling bison to output the header file to the correct
+filename in the first place so that we don't have to rename it.
+(using the --defines instead of -d option).
+
+This looks like a bison specific option not available in Posix yacc;
+but looks like we're requiring bison anyway.
+
+Signed-off-by: Henner Zeller <h.zeller@acm.org>
+---
+ Makefile.in         | 4 +---
+ tgt-pcb/Makefile.in | 4 +---
+ vhdlpp/Makefile.in  | 4 +---
+ vvp/Makefile.in     | 4 +---
+ 4 files changed, 4 insertions(+), 12 deletions(-)
+
+diff --git a/Makefile.in b/Makefile.in
+index 5ac5515a..cc8cac46 100644
+--- a/Makefile.in
++++ b/Makefile.in
+@@ -256,10 +256,8 @@ parse.o: parse.cc
+ 
+ # Build this in two steps to avoid parallel build issues (see pr3462585)
+ parse.cc: $(srcdir)/parse.y
+-	$(YACC) --verbose -t -p VL -d -o $@ $<
++	$(YACC) --verbose -t -p VL --defines=parse.h -o $@ $<
+ parse.h: parse.cc
+-	mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
+-	touch $@
+ 
+ syn-rules.cc: $(srcdir)/syn-rules.y
+ 	$(YACC) --verbose -t -p syn_ -o $@ $<
+diff --git a/tgt-pcb/Makefile.in b/tgt-pcb/Makefile.in
+index a5f9b7d5..7345e195 100644
+--- a/tgt-pcb/Makefile.in
++++ b/tgt-pcb/Makefile.in
+@@ -89,10 +89,8 @@ fp_lex.cc: $(srcdir)/fp.lex
+ 	$(LEX) -s -ofp_lex.cc $(srcdir)/fp.lex
+ 
+ fp.cc: $(srcdir)/fp.y
+-	$(YACC) --verbose -t -p fp -d -o $@ $<
++	$(YACC) --verbose -t -p fp --defines=fp.h -o $@ $<
+ fp.h: fp.cc
+-	mv fp.cc.h $@ 2>/dev/null || mv fp.hh $@
+-	touch $@
+ 
+ ifeq (@WIN32@,yes)
+   TGTLDFLAGS=-L.. -livl
+diff --git a/vhdlpp/Makefile.in b/vhdlpp/Makefile.in
+index 53ae140a..458178bd 100644
+--- a/vhdlpp/Makefile.in
++++ b/vhdlpp/Makefile.in
+@@ -117,10 +117,8 @@ lexor.cc: $(srcdir)/lexor.lex
+ 
+ # Build this in two steps to avoid parallel build issues (see pr3462585)
+ parse.cc: $(srcdir)/parse.y
+-	$(YACC) --verbose -t -d -o $@ $<
++	$(YACC) --verbose -t --defines=parse.h -o $@ $<
+ parse.h: parse.cc
+-	mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
+-	touch $@
+ 
+ lexor_keyword.o: lexor_keyword.cc parse.h
+ 
+diff --git a/vvp/Makefile.in b/vvp/Makefile.in
+index 8ccdb1d2..cdd940f5 100644
+--- a/vvp/Makefile.in
++++ b/vvp/Makefile.in
+@@ -142,10 +142,8 @@ tables.o: tables.cc
+ 
+ # Build this in two steps to avoid parallel build issues (see pr3462585)
+ parse.cc: $(srcdir)/parse.y
+-	$(YACC) --verbose -t -d -o $@ $<
++	$(YACC) --verbose -t --defines=parse.h -o $@ $<
+ parse.h: parse.cc
+-	mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
+-	touch $@
+ 
+ lexor.cc: $(srcdir)/lexor.lex
+ 	$(LEX) -s -olexor.cc $(srcdir)/lexor.lex
+-- 
+2.26.2
+
diff --git a/sci-electronics/iverilog/iverilog-0.9.6.ebuild b/sci-electronics/iverilog/iverilog-0.9.6.ebuild
deleted file mode 100644
index eb137e4aeb13..000000000000
--- a/sci-electronics/iverilog/iverilog-0.9.6.ebuild
+++ /dev/null
@@ -1,49 +0,0 @@
-# Copyright 1999-2014 Gentoo Foundation
-# Distributed under the terms of the GNU General Public License v2
-
-EAPI=4
-
-inherit eutils multilib
-
-DESCRIPTION="A Verilog simulation and synthesis tool"
-SRC_URI="ftp://icarus.com/pub/eda/verilog/v${PV:0:3}/verilog-${PV}.tar.gz"
-HOMEPAGE="http://iverilog.icarus.com/"
-
-LICENSE="GPL-2"
-SLOT="0"
-KEYWORDS="amd64 ppc sparc x86"
-IUSE="examples"
-
-RDEPEND="app-arch/bzip2
-	sys-libs/readline
-	sys-libs/zlib"
-DEPEND="${RDEPEND}"
-
-S="${WORKDIR}/verilog-${PV}"
-
-src_prepare() {
-	# Fix tests
-	mkdir -p lib/ivl
-	touch lib/ivl/ivl
-	sed -i -e 's/driver\/iverilog -B./IVERILOG_ROOT="." driver\/iverilog -B./' Makefile.in || die
-
-	# Fix LDFLAGS
-	sed -i -e 's/@shared@/@shared@ $(LDFLAGS)/' {cadpli,tgt-vhdl,tgt-null,tgt-stub,tgt-vvp}/Makefile.in || die
-}
-
-src_install() {
-	emake -j1 \
-		prefix="${ED}"/usr \
-		mandir="${ED}"/usr/share/man \
-		infodir="${ED}"/usr/share/info \
-		libdir="${ED}"/usr/$(get_libdir) \
-		libdir64="${ED}"/usr/$(get_libdir) \
-		vpidir="${ED}"/usr/$(get_libdir)/ivl \
-		install
-
-	dodoc *.txt
-	if use examples ; then
-		insinto /usr/share/doc/${PF}
-		doins -r examples
-	fi
-}
diff --git a/sci-electronics/iverilog/iverilog-0.9.7.ebuild b/sci-electronics/iverilog/iverilog-0.9.7.ebuild
deleted file mode 100644
index 6a0aa268dd65..000000000000
--- a/sci-electronics/iverilog/iverilog-0.9.7.ebuild
+++ /dev/null
@@ -1,49 +0,0 @@
-# Copyright 1999-2014 Gentoo Foundation
-# Distributed under the terms of the GNU General Public License v2
-
-EAPI=4
-
-inherit eutils multilib
-
-DESCRIPTION="A Verilog simulation and synthesis tool"
-SRC_URI="ftp://icarus.com/pub/eda/verilog/v${PV:0:3}/verilog-${PV}.tar.gz"
-HOMEPAGE="http://iverilog.icarus.com/"
-
-LICENSE="GPL-2"
-SLOT="0"
-KEYWORDS="~amd64 ~ppc ~sparc ~x86"
-IUSE="examples"
-
-RDEPEND="app-arch/bzip2
-	sys-libs/readline
-	sys-libs/zlib"
-DEPEND="${RDEPEND}"
-
-S="${WORKDIR}/verilog-${PV}"
-
-src_prepare() {
-	# Fix tests
-	mkdir -p lib/ivl
-	touch lib/ivl/ivl
-	sed -i -e 's/driver\/iverilog -B./IVERILOG_ROOT="." driver\/iverilog -B./' Makefile.in || die
-
-	# Fix LDFLAGS
-	sed -i -e 's/@shared@/@shared@ $(LDFLAGS)/' {cadpli,tgt-vhdl,tgt-null,tgt-stub,tgt-vvp}/Makefile.in || die
-}
-
-src_install() {
-	emake -j1 \
-		prefix="${ED}"/usr \
-		mandir="${ED}"/usr/share/man \
-		infodir="${ED}"/usr/share/info \
-		libdir="${ED}"/usr/$(get_libdir) \
-		libdir64="${ED}"/usr/$(get_libdir) \
-		vpidir="${ED}"/usr/$(get_libdir)/ivl \
-		install
-
-	dodoc *.txt
-	if use examples ; then
-		insinto /usr/share/doc/${PF}
-		doins -r examples
-	fi
-}
diff --git a/sci-electronics/iverilog/iverilog-10.2.ebuild b/sci-electronics/iverilog/iverilog-10.2.ebuild
deleted file mode 100644
index adcc651fe357..000000000000
--- a/sci-electronics/iverilog/iverilog-10.2.ebuild
+++ /dev/null
@@ -1,32 +0,0 @@
-# Copyright 1999-2018 Gentoo Foundation
-# Distributed under the terms of the GNU General Public License v2
-
-EAPI=6
-
-DESCRIPTION="A Verilog simulation and synthesis tool"
-SRC_URI="ftp://icarus.com/pub/eda/verilog/v${PV:0:2}/verilog-${PV}.tar.gz"
-HOMEPAGE="http://iverilog.icarus.com/"
-
-LICENSE="GPL-2"
-SLOT="0"
-KEYWORDS="~amd64 ~ppc ~sparc ~x86"
-IUSE="examples"
-
-RDEPEND="
-	app-arch/bzip2
-	sys-libs/readline:0=
-	sys-libs/zlib:="
-DEPEND="${RDEPEND}"
-
-S="${WORKDIR}/${P#i}"
-
-src_install() {
-	emake -j1 DESTDIR="${D}" install
-	einstalldocs
-	dodoc *.txt
-
-	if use examples; then
-		dodoc -r examples
-		docompress -x /usr/share/doc/${PF}/examples
-	fi
-}
diff --git a/sci-electronics/iverilog/iverilog-10.3-r2.ebuild b/sci-electronics/iverilog/iverilog-10.3-r2.ebuild
new file mode 100644
index 000000000000..5d2c037dbaa9
--- /dev/null
+++ b/sci-electronics/iverilog/iverilog-10.3-r2.ebuild
@@ -0,0 +1,71 @@
+# Copyright 1999-2020 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=7
+
+inherit autotools
+
+GITHUB_PV=$(ver_rs 1- '_')
+
+DESCRIPTION="A Verilog simulation and synthesis tool"
+HOMEPAGE="
+	http://iverilog.icarus.com
+	https://github.com/steveicarus/iverilog
+"
+
+if [[ ${PV} == "9999" ]] ; then
+	inherit git-r3
+	EGIT_REPO_URI="https://github.com/steveicarus/${PN}.git"
+else
+	SRC_URI="https://github.com/steveicarus/${PN}/archive/v${GITHUB_PV}.tar.gz -> ${P}.tar.gz"
+	KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
+	S="${WORKDIR}/${PN}-${GITHUB_PV}"
+fi
+
+LICENSE="LGPL-2.1"
+SLOT="0"
+
+DEPEND="
+	sys-libs/readline:=
+	sys-libs/zlib
+"
+RDEPEND="${DEPEND}"
+BDEPEND="dev-util/gperf
+	sys-devel/bison
+	sys-devel/flex
+"
+
+PATCHES=(
+	"${FILESDIR}"/${PN}-10.3-file-missing.patch #705412
+	"${FILESDIR}"/${PN}-10.3-fno-common.patch #706366
+	"${FILESDIR}"/${PN}-10.3-gen-bison-header.patch #734760
+)
+
+src_prepare() {
+	default
+
+	# From upstreams autoconf.sh, to make it utilize the autotools eclass
+	# Here translate the autoconf.sh, equivalent to the following code
+	# > sh autoconf.sh
+
+	# Autoconf in root ...
+	eautoconf
+
+	# Precompiling lexor_keyword.gperf
+	gperf -o -i 7 -C -k 1-4,6,9,\$ -H keyword_hash -N check_identifier -t ./lexor_keyword.gperf > lexor_keyword.cc || die
+	# Precompiling vhdlpp/lexor_keyword.gperf
+	cd vhdlpp || die
+	gperf -o -i 7 --ignore-case -C -k 1-4,6,9,\$ -H keyword_hash -N check_identifier -t ./lexor_keyword.gperf > lexor_keyword.cc || die
+}
+
+src_install() {
+	local DOCS=( *.txt )
+
+	# Default build fails with parallel jobs,
+	# https://github.com/steveicarus/iverilog/pull/294
+	emake installdirs DESTDIR="${ED}"
+	default
+
+	dodoc -r examples
+	docompress -x /usr/share/doc/${PF}/examples
+}
diff --git a/sci-electronics/iverilog/iverilog-9999.ebuild b/sci-electronics/iverilog/iverilog-9999.ebuild
index c7053b775265..eb85629d9e8e 100644
--- a/sci-electronics/iverilog/iverilog-9999.ebuild
+++ b/sci-electronics/iverilog/iverilog-9999.ebuild
@@ -26,18 +26,14 @@ LICENSE="LGPL-2.1"
 SLOT="0"
 IUSE="examples"
 
-# If you are building from git, you will also need gperf to generate
-# the configure scripts.
-RDEPEND="
+DEPEND="
 	sys-libs/readline:=
 	sys-libs/zlib
 "
-
-DEPEND="
-	dev-util/gperf
+RDEPEND="${DEPEND}"
+BDEPEND="dev-util/gperf
 	sys-devel/bison
 	sys-devel/flex
-	${RDEPEND}
 "
 
 src_prepare() {