gentoo resync : 18.03.2018

3 files changed, 97 insertions, 0 deletions

diff --git a/sys-firmware/Manifest.gz b/sys-firmware/Manifest.gz
index ade9c2e73c56..e546884641b3 100644
--- a/sys-firmware/Manifest.gz
+++ b/sys-firmware/Manifest.gz
diff --git a/sys-firmware/intel-microcode/Manifest b/sys-firmware/intel-microcode/Manifest
index 869c0da1a38d..e9c07b38e289 100644
--- a/sys-firmware/intel-microcode/Manifest
+++ b/sys-firmware/intel-microcode/Manifest
@@ -14,6 +14,7 @@ DIST microcode-20171117.tgz 3594762 BLAKE2B 7a02c28ec6b9b22a367f8fd7d59f244d0195
 DIST microcode-20171117_p20171215-r1.tgz 1477015 BLAKE2B 3911aed3bbbd350be69a99bc855cdec6e8dc2a77f64c4d3a6c1aa24455d5c97eb1c03917eddb4cac2018f6da20a1751cc819a5f27f866f64fc56c7279b5ca40f SHA512 05466e16f9778a3ab148fa5485cd605bca7990067040aa9133ec4c3c1b007519cb260fe8811b44df1192ca0e84237f00d7afccfa11103f3dd4a99c08c692ecb0
 DIST microcode-20171117_p20171215.tgz 1468587 BLAKE2B 58777a39f843ae880f7dd8971a9570dbfc176d69541bb9d3cdc948d7be71a7df2559265fb1c8a199bc7567bb5a60176ade1d2c36624d0193dbac98d82401d0dd SHA512 25db94dbf18b1fea9497ec1e61bb5349d7bc78b0578d8869546bc3ec579b96bee7cd62657e66ebd3d4616805e85d790ac7ee7c0fed70b5db30236ffd12b33293
 DIST microcode-20180108.tgz 3676678 BLAKE2B 197e0188e516a3071be9e2e7a6261d78208613db8b746c7df533ce37884197dbd06a4e6ab027cbddba38903f590130f2d974e46da8fbab0613561523653460ab SHA512 f4010d83353948df27beeb804ef11e4f019f63397a4936f9d139e2842f7944d1ae864b9376987eaffc7db5b97201d5de2f4c1d7cc6b0f545ae15ec53a61fce2b
+DIST microcode-20180312.tgz 3789662 BLAKE2B e948d74833fe75b9bbdff1e4676f5d49a13bdd06aa6525c39be3448b822203947a5f55515484401ee0c96e8ade19ea580718949bed65883d983509661a16e637 SHA512 cc2cabf6d12c83b65eeb30fca7eb0b503e037dbee3d7ce9cb307b02ed8ac9426b2bafc2c1f1281dddff0945f8308f0d3cd320edea4596551354188d64760b854
 EBUILD intel-microcode-20140430.ebuild 1169 BLAKE2B eab5c169361c8954bc6adf7035e2cdcb6602cd777cc0d02fc9308f0be06863c1e760e23e01c47458d329a11dfc5a6dd4bc5acc2eab88d4c6e4b7e9ff23515e71 SHA512 c0b31a6fcac608c7ba811b4ffc068172fdaed22c58dc29a5526275b0935d7c9210381978f224f419ca4071dd79d04ba3b8e2e788e5d2343bc46bcb3b4a3c570a
 EBUILD intel-microcode-20140624.ebuild 1171 BLAKE2B 9376abe8e21dbafb22978fc8607638380a6d69727df313300b4527a6afbaf56d74a72432b57d2b67cfad829aa2b93da8a2bd4e93d86ed6e44c704fbab0a512c5 SHA512 c8ea78ebe459ff578f11c06c29fa58f87793f1b5ea6f7b93586af36ecc586cc5f03576b71f15b729c0c9bb97886244de4febb2dcd73fa6206ffb312622ff83c9
 EBUILD intel-microcode-20140913.ebuild 1171 BLAKE2B ecb957649f70ff9e0cd52b7332870f5cb3917afde0e19e7bfc250e777468e39d2cece9dc5265962b0b779abca5e36c4f43793b5d2d30f9e24c66d5467a0d554a SHA512 a52bd7f6e9b2e35d207d6a3f819576e8654435220034631ac26a352159fc34edd6cc49d3545f50dcbb44ea824be59dd775938c86f432226e8334c5bcc12c4f8e
@@ -31,4 +32,5 @@ EBUILD intel-microcode-20171117_p20171215-r1.ebuild 1155 BLAKE2B 12b179939ea6c2e
 EBUILD intel-microcode-20171117_p20171215.ebuild 1149 BLAKE2B 54add03072f87c0e1083a637d08143dc7457f1164958e5228e9968c762f24f4731a359a44d4eded63ff501faa9df9e3fd90d01131042da53f0fa411d47a53e7d SHA512 298d7d99b7d715abbd64d02f6762186b4fb556e05d9c2adef563c9c5659dee334127ac12e170a39779f466609500c2e74307799b6b8796095356803d3c194696
 EBUILD intel-microcode-20180108-r1.ebuild 2590 BLAKE2B 7b27e37821f6831f5a1d53d447c2bd1f532456a53460b76787732435854dec92584d301fd897b02c1cf9d2534bf2c1caec74d17230f338e3cf9449b13d889640 SHA512 9c56b8b2d4dce67d413a6241e87e445b87fab5a13829c68fbb9765a9e1b88804a52c112ea01182a5ab435d632cafb029d426206c6366b011ca99d85e07bad820
 EBUILD intel-microcode-20180108.ebuild 1328 BLAKE2B 27e9dfb4283a5ed844514b1fc0df0afe793776454fd9748fd00b68947834465a667b86e9b262a4161d142b42fef80651391fcf872857abaeef66de5492528f3c SHA512 d6a0b50abe64c41bac70172e0672442e46458789ee9fac3df39f91c66f16011f4bd639dcb3cbe236429223d4d51c581ed345e2048bfce205c98a3b05a580839b
+EBUILD intel-microcode-20180312.ebuild 2591 BLAKE2B 364a549cd3a6d3b7c585e280dda2b5d9d067d3036d127c9c7ebeab70d7af051fd93a5f7cb77d1a64357a62d7439992d6bad1066826d4019f253f40233489a922 SHA512 dc86e35b6ebb5a5cda3b21dcb65cf5358269b06acff87f7f87f1dac21fa7e2b604f6cdd958680785ab04704ec06bc2d6744a5c817d41597d634a0b65d3971b68
 MISC metadata.xml 570 BLAKE2B d49b45c4dff6e9116a388c1ab183461f609d31ed2f07c9145847b1cbb30ebf54922fb2474be2947d8668f7dfa5e06f4ac2beb7ab2b39a90976901a16862a3ef9 SHA512 f0c8094b68e2cb452975b01fbdb8c32f031fe1ef26971d518245dd886d2da8ab6c058d61cb4b4b9b1cb56a754cd08c3ef3fa30e280042675fa2d8705874a763e
diff --git a/sys-firmware/intel-microcode/intel-microcode-20180312.ebuild b/sys-firmware/intel-microcode/intel-microcode-20180312.ebuild
new file mode 100644
index 000000000000..3ecd66eb44da
--- /dev/null
+++ b/sys-firmware/intel-microcode/intel-microcode-20180312.ebuild
@@ -0,0 +1,95 @@
+# Copyright 1999-2018 Gentoo Foundation
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI="6"
+
+inherit toolchain-funcs mount-boot
+
+# Find updates by searching and clicking the first link (hopefully it's the one):
+# http://www.intel.com/content/www/us/en/search.html?keyword=Processor+Microcode+Data+File
+
+NUM="27591"
+DESCRIPTION="Intel IA32/IA64 microcode update data"
+HOMEPAGE="http://inertiawar.com/microcode/ https://downloadcenter.intel.com/Detail_Desc.aspx?DwnldID=${NUM}"
+SRC_URI="https://downloadmirror.intel.com/${NUM}/eng/microcode-${PV}.tgz"
+
+LICENSE="intel-ucode"
+SLOT="0"
+KEYWORDS="-* amd64 x86"
+IUSE="initramfs +split-ucode"
+REQUIRED_USE="|| ( initramfs split-ucode )"
+
+DEPEND="sys-apps/iucode_tool"
+RDEPEND="!<sys-apps/microcode-ctl-1.17-r2" #268586
+
+S=${WORKDIR}
+
+# TODO: 
+# Blacklist bad microcode here.
+DEFAULT_MICROCODE_SIGNATURES=""
+
+# Advanced users only:
+# merge with:
+# only current CPU: MICROCODE_SIGNATURES="-S"
+# only specific CPU: MICROCODE_SIGNATURES="-s 0x00000f4a -s 0x00010676"
+# exclude specific CPU: MICROCODE_SIGNATURES="-s !0x00000686"
+MICROCODE_SIGNATURES="${MICROCODE_SIGNATURES:=${DEFAULT_MICROCODE_SIGNATURES}}"
+
+pkg_pretend() {
+	if [[ "${MICROCODE_SIGNATURES}" != "${DEFAULT_MICROCODE_SIGNATURES}" ]]; then
+		ewarn "MICROCODE_SIGNATURES is set!"
+		ewarn "The user has decided to install only a SUBSET of microcode."
+	fi
+	use initramfs && mount-boot_pkg_pretend
+}
+
+src_install() {
+	# This will take ALL of the upstream microcode sources:
+	# - microcode.dat
+	# - intel-ucode/
+	# In some cases, they have not contained the same content (eg the directory has newer stuff).
+	MICROCODE_SRC=(
+		"${S}"/microcode.dat
+		"${S}"/intel-ucode/
+	)
+	opts=(
+		${MICROCODE_SIGNATURES}
+		# be strict about what we are doing
+		--overwrite
+		--strict-checks
+		--no-ignore-broken
+		# show everything we find
+		--list-all
+		# show what we selected
+		--list
+	)
+
+	# The earlyfw cpio needs to be in /boot because it must be loaded before
+	# rootfs is mounted.
+	use initramfs && dodir /boot && opts+=( --write-earlyfw="${ED%/}"/boot/intel-uc.img )
+	# split location:
+	use split-ucode && dodir /lib/firmware/intel-ucode && opts+=( --write-firmware="${ED%/}"/lib/firmware/intel-ucode )
+
+	iucode_tool \
+		"${opts[@]}" \
+		"${MICROCODE_SRC[@]}" \
+		|| die "iucode_tool ${opts[@]} ${MICROCODE_SRC[@]}"
+
+	dodoc releasenote
+}
+
+pkg_preinst() {
+	use initramfs && mount-boot_pkg_preinst
+}
+
+pkg_prerm() {
+	use initramfs && mount-boot_pkg_prerm
+}
+
+pkg_postrm() {
+	use initramfs && mount-boot_pkg_postrm
+}
+
+pkg_postinst() {
+	use initramfs && mount-boot_pkg_postinst
+}