diff options
| author | V3n3RiX <venerix@redcorelinux.org> | 2018-01-27 18:07:28 +0000 |
|---|---|---|
| committer | V3n3RiX <venerix@redcorelinux.org> | 2018-01-27 18:07:28 +0000 |
| commit | 67f76a858f1ac826bd8a550d756d9ec6e340ed4f (patch) | |
| tree | 45f4ada6be05bc180a14e017c9d5c6b58a0eec6e /metadata/md5-cache/sci-electronics/iverilog-10.2 | |
| parent | 38b7258d086dd5e263c3bbe3880c8c956676bc71 (diff) | |
gentoo resync : 27.01.2018
Diffstat (limited to 'metadata/md5-cache/sci-electronics/iverilog-10.2')
| -rw-r--r-- | metadata/md5-cache/sci-electronics/iverilog-10.2 | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/metadata/md5-cache/sci-electronics/iverilog-10.2 b/metadata/md5-cache/sci-electronics/iverilog-10.2 new file mode 100644 index 000000000000..c2ccfae8e7b2 --- /dev/null +++ b/metadata/md5-cache/sci-electronics/iverilog-10.2 @@ -0,0 +1,12 @@ +DEFINED_PHASES=install +DEPEND=app-arch/bzip2 sys-libs/readline:0= sys-libs/zlib:= +DESCRIPTION=A Verilog simulation and synthesis tool +EAPI=6 +HOMEPAGE=http://iverilog.icarus.com/ +IUSE=examples +KEYWORDS=~amd64 ~ppc ~sparc ~x86 +LICENSE=GPL-2 +RDEPEND=app-arch/bzip2 sys-libs/readline:0= sys-libs/zlib:= +SLOT=0 +SRC_URI=ftp://icarus.com/pub/eda/verilog/v10/verilog-10.2.tar.gz +_md5_=9fe4104a245392cdea2cb1101e623711 |