gentoo auto-resync : 21:01:2024 - 02:09:25

3 files changed, 186 insertions, 2 deletions

diff --git a/dev-util/spirv-llvm-translator/Manifest b/dev-util/spirv-llvm-translator/Manifest
index 9c881a60066e..392020501023 100644
--- a/dev-util/spirv-llvm-translator/Manifest
+++ b/dev-util/spirv-llvm-translator/Manifest
@@ -1,9 +1,10 @@
 AUX spirv-llvm-translator-16.0.0-ld_library_path.patch 2545 BLAKE2B b0a361f430bf7abd3e3cc24a71b7df5a8feda3bfef0b2832462b68c005356c6437c75f0257b66a3add54d3b1999275ff20cedfe9480c0ae63e78d32427c835f5 SHA512 73a134b774ee772f809b55f3369f6007b0fd19c9ddf566e81387fff5b4498c47dc5e3ada6367e2ccf3498346027543034d75977cb78d365d1c99405b9323b4e6
 AUX spirv-llvm-translator-16.0.0-llvm-link-llvm-dylib.patch 1755 BLAKE2B fa0465b04580a68258adc8aa3e73a9d66b75a7c0896e5b646a0e0860400c675a5ea09164d844f72a5a98933095e332c18e480833eb75c76e875f10105ea6dbea SHA512 b5e9a771c1b4b062777f7c7f994224bae54f036c46df0e275d276856d74f778843f6fa1cb77fb714e72b20704d5a22daeb0e83c93fb557d629809eb680f6c3a2
+AUX spirv-llvm-translator-17.0.0-intel-capability.patch 9322 BLAKE2B aa847ba0376fd78cd105b6dce4d785cb060f08a04da0ca52a12f689bbbb49b3eaec579669458e70c2b7f75b446752492e07cdc62c39e57e465532ce3f55b0cb4 SHA512 912ed2ffccb033c5bd7790e7d8e2f63437388375c17d8191a1fc4409daba9e2bd9e00ca3232ff4451f58fc430e040d7837f700f844c0a6fb14bfdccd61829a4a
 DIST spirv-llvm-translator-15.0.0.tar.gz 1515145 BLAKE2B 1f93b55f8934ce7dbc9416b82f7bd544d16e95be795047e914d0c303ec90965eae03ab3522b3c92d6cffb1fe00bed78a4bb74085d3da21c14b68ad3fbe53113c SHA512 8a6ddddf326dad96c1c5749ebf03e63e6be60592dccd307f7a35be668cec2b4f58c2f089854aeefa37398c3a97dad6bf92a6ceb892da27b5cf9d4ae1aa41dd06
 DIST spirv-llvm-translator-16.0.0.tar.gz 1542060 BLAKE2B bee72a776062266e60c5237396434ecba4e4da959ed52292ad08388bdd08d7749fd86cfac5c25af424032a1ba19f59b2d8c7eac0eaf50db6a4945841abe0836f SHA512 0bacacb89aa2b03d1173d1bfbcdd83fdce7441ebc3fff65e14dc5e901fc983861365a54c029b2a65075b6fa45046c30aa7bbad4e6150cf3382e7d050c598de98
 DIST spirv-llvm-translator-17.0.0.tar.gz 1601166 BLAKE2B c3e7a78fa55cd13ba61c024e2d3d82c47ac9dbf8c11bcbcf4ddc34a6838fb948885a263fd9af2d0f404b31f4c6e9226c9582e0f65b3220770e1af07cf85f4dac SHA512 ee54e597c678755cb48d677f81184d66616c7be934b570e04f0106e64c15f1cab124177b757f08a7713fa7fce981c74d61304d4554e6d198e6c14c53abf1e81c
 EBUILD spirv-llvm-translator-15.0.0-r1.ebuild 1160 BLAKE2B e743e55a4c13939b57e12e26d4a2dc5ca567f37560ce53283c1f7a032a31bbc8fd9cdc9c70ebad40fcc1fa412d77517ddbe6a9b4ace15a83007d96f1a1aaf051 SHA512 139b3d01c309b89559e416fa3d19926c545023020b2a284e7ba21f87bf1ba1c27dd57df0a05f7d971f33fd2d061914fc9e838cb9edcce54f1574b5b7bd6aecee
 EBUILD spirv-llvm-translator-16.0.0-r1.ebuild 1332 BLAKE2B bf8238a55518f2e57dd920938b5742aa9c1d75f06cccc3ab77314b9bf4f86d2645660936bb48f0bd1d6849e8cead4bfdf7636bd200cffa971f868f3559874058 SHA512 5bcccf3be4449e4c764ecede7a0052ce0f2e462f4f9d4d4ffaf6ebefeea9055eb9026f522764d4df97bbbbab89f9645c512047c504d7a9037d42791e50dcf45b
-EBUILD spirv-llvm-translator-17.0.0.ebuild 1232 BLAKE2B 0f525d077710a4391dec8882185be865b9bd5f0c05d5f5c55a7d5cba77a0b77b070ff70fb663c9e8eee558e1027332dc7303348d8deeed6cc81e5e60f7b6bda8 SHA512 ff9c010e4fe37396f445bf630e1afc7f7908cbe2db927bdafde5ec166344380f9247100e077575725e38b85ec7d6ad1fdc4c6cc7d7800414099241315c76828e
+EBUILD spirv-llvm-translator-17.0.0-r1.ebuild 1295 BLAKE2B bcaee23ef169e5c2f1f1b40405a579f18da309f6e9a4d60768e915e5635e8f00ddc84c6a8e1d97700bc1531d2ca207a0ebf1a0ebf35c004a92adf430124891b6 SHA512 3e68a2ea03f0c2b636860abb0c93dbc7d0a4a6b1f677e20deb6f010e245da0bd58bb49b4eefc26893cbf7d01197bd3bb927c564e9b4c2297a79900faf5e8075b
 MISC metadata.xml 445 BLAKE2B 11c5d6b6e94192c6fe1aa0cdce39ddb6e3e0aac1462533b5480136c415cc5d82ac77c4930a07a234d0ae987d3409c8dae590f0d5b99139282a89939d0b65cf4e SHA512 e58ae0f86f23be399eff43be9b90006f9be0f699af67f354f2e5434bc0fd43856863763192e0270fd06f7df65e0bdea2bd0b9d43b5b200d8a0399e0230c86e71
diff --git a/dev-util/spirv-llvm-translator/files/spirv-llvm-translator-17.0.0-intel-capability.patch b/dev-util/spirv-llvm-translator/files/spirv-llvm-translator-17.0.0-intel-capability.patch
new file mode 100644
index 000000000000..d7839367a2a1
--- /dev/null
+++ b/dev-util/spirv-llvm-translator/files/spirv-llvm-translator-17.0.0-intel-capability.patch
@@ -0,0 +1,181 @@
+diff --git a/include/LLVMSPIRVExtensions.inc b/include/LLVMSPIRVExtensions.inc
+index eb98c7f..4e2eb0b 100644
+--- a/include/LLVMSPIRVExtensions.inc
++++ b/include/LLVMSPIRVExtensions.inc
+@@ -41,7 +41,7 @@ EXT(SPV_INTEL_variable_length_array)
+ EXT(SPV_INTEL_fp_fast_math_mode)
+ EXT(SPV_INTEL_fpga_cluster_attributes)
+ EXT(SPV_INTEL_loop_fuse)
+-EXT(SPV_INTEL_long_constant_composite)
++EXT(SPV_INTEL_long_composites)
+ EXT(SPV_INTEL_optnone)
+ EXT(SPV_INTEL_fpga_dsp_control)
+ EXT(SPV_INTEL_memory_access_aliasing)
+diff --git a/lib/SPIRV/SPIRVWriter.cpp b/lib/SPIRV/SPIRVWriter.cpp
+index 807aa0c..0946dbe 100644
+--- a/lib/SPIRV/SPIRVWriter.cpp
++++ b/lib/SPIRV/SPIRVWriter.cpp
+@@ -409,11 +409,10 @@ SPIRVType *LLVMToSPIRVBase::transType(Type *T) {
+     const size_t NumElements = ST->getNumElements();
+     size_t SPIRVStructNumElements = NumElements;
+     // In case number of elements is greater than maximum WordCount and
+-    // SPV_INTEL_long_constant_composite is not enabled, the error will be
++    // SPV_INTEL_long_composites is not enabled, the error will be
+     // emitted by validate functionality of SPIRVTypeStruct class.
+     if (NumElements > MaxNumElements &&
+-        BM->isAllowedToUseExtension(
+-            ExtensionID::SPV_INTEL_long_constant_composite)) {
++        BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_composites)) {
+       SPIRVStructNumElements = MaxNumElements;
+     }
+ 
+@@ -421,8 +420,7 @@ SPIRVType *LLVMToSPIRVBase::transType(Type *T) {
+     mapType(T, Struct);
+ 
+     if (NumElements > MaxNumElements &&
+-        BM->isAllowedToUseExtension(
+-            ExtensionID::SPV_INTEL_long_constant_composite)) {
++        BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_composites)) {
+       uint64_t NumOfContinuedInstructions = NumElements / MaxNumElements - 1;
+       for (uint64_t J = 0; J < NumOfContinuedInstructions; J++) {
+         auto *Continued = BM->addTypeStructContinuedINTEL(MaxNumElements);
+@@ -1832,8 +1830,7 @@ LLVMToSPIRVBase::transValueWithoutDecoration(Value *V, SPIRVBasicBlock *BB,
+       } else
+         BVarInit = I->second;
+     } else if (Init && !isa<UndefValue>(Init)) {
+-      if (!BM->isAllowedToUseExtension(
+-              ExtensionID::SPV_INTEL_long_constant_composite)) {
++      if (!BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_composites)) {
+         if (auto ArrTy = dyn_cast_or_null<ArrayType>(Init->getType())) {
+           // First 3 words of OpConstantComposite encode: 1) word count &
+           // opcode, 2) Result Type and 3) Result Id. Max length of SPIRV
+diff --git a/lib/SPIRV/libSPIRV/SPIRVEntry.h b/lib/SPIRV/libSPIRV/SPIRVEntry.h
+index a3c9441..e188099 100644
+--- a/lib/SPIRV/libSPIRV/SPIRVEntry.h
++++ b/lib/SPIRV/libSPIRV/SPIRVEntry.h
+@@ -908,11 +908,11 @@ public:
+   }
+ 
+   SPIRVCapVec getRequiredCapability() const override {
+-    return getVec(CapabilityLongConstantCompositeINTEL);
++    return getVec(CapabilityLongCompositesINTEL);
+   }
+ 
+   std::optional<ExtensionID> getRequiredExtension() const override {
+-    return ExtensionID::SPV_INTEL_long_constant_composite;
++    return ExtensionID::SPV_INTEL_long_composites;
+   }
+ 
+   SPIRVWord getNumElements() const { return Elements.size(); }
+diff --git a/lib/SPIRV/libSPIRV/SPIRVModule.cpp b/lib/SPIRV/libSPIRV/SPIRVModule.cpp
+index 5ac7275..d8d06f6 100644
+--- a/lib/SPIRV/libSPIRV/SPIRVModule.cpp
++++ b/lib/SPIRV/libSPIRV/SPIRVModule.cpp
+@@ -1175,10 +1175,10 @@ SPIRVValue *SPIRVModuleImpl::addCompositeConstant(
+   const int NumElements = Elements.size();
+ 
+   // In case number of elements is greater than maximum WordCount and
+-  // SPV_INTEL_long_constant_composite is not enabled, the error will be emitted
++  // SPV_INTEL_long_composites is not enabled, the error will be emitted
+   // by validate functionality of SPIRVCompositeConstant class.
+   if (NumElements <= MaxNumElements ||
+-      !isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_constant_composite))
++      !isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_composites))
+     return addConstant(new SPIRVConstantComposite(this, Ty, getId(), Elements));
+ 
+   auto Start = Elements.begin();
+@@ -1213,7 +1213,7 @@ SPIRVValue *SPIRVModuleImpl::addSpecConstantComposite(
+   // SPV_INTEL_long_constant_composite is not enabled, the error will be emitted
+   // by validate functionality of SPIRVSpecConstantComposite class.
+   if (NumElements <= MaxNumElements ||
+-      !isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_constant_composite))
++      !isAllowedToUseExtension(ExtensionID::SPV_INTEL_long_composites))
+     return addConstant(
+         new SPIRVSpecConstantComposite(this, Ty, getId(), Elements));
+ 
+diff --git a/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h b/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
+index d450a43..a2a0ddb 100644
+--- a/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
++++ b/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
+@@ -610,7 +610,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
+   add(CapabilityGroupNonUniformRotateKHR, "GroupNonUniformRotateKHR");
+   add(CapabilityAtomicFloat32AddEXT, "AtomicFloat32AddEXT");
+   add(CapabilityAtomicFloat64AddEXT, "AtomicFloat64AddEXT");
+-  add(CapabilityLongConstantCompositeINTEL, "LongConstantCompositeINTEL");
++  add(CapabilityLongCompositesINTEL, "LongCompositesINTEL");
+   add(CapabilityOptNoneINTEL, "OptNoneINTEL");
+   add(CapabilityAtomicFloat16AddEXT, "AtomicFloat16AddEXT");
+   add(CapabilityDebugInfoModuleINTEL, "DebugInfoModuleINTEL");
+diff --git a/test/SpecConstants/long-spec-const-composite.ll b/test/SpecConstants/long-spec-const-composite.ll
+index a45c895..e943296 100644
+--- a/test/SpecConstants/long-spec-const-composite.ll
++++ b/test/SpecConstants/long-spec-const-composite.ll
+@@ -1,5 +1,5 @@
+ ; RUN: llvm-as %s -o %t.bc
+-; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_constant_composite %t.bc -o %t.spv
++; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_composites %t.bc -o %t.spv
+ ; RUN: llvm-spirv %t.spv --to-text -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+ ; RUN: llvm-spirv -r -emit-opaque-pointers %t.spv -o %t.rev.bc
+ ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
+@@ -11,8 +11,8 @@
+ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+ target triple = "spir64-unknown-unknown"
+ 
+-; CHECK-SPIRV: Capability LongConstantCompositeINTEL 
+-; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
++; CHECK-SPIRV: Capability LongCompositesINTEL
++; CHECK-SPIRV: Extension "SPV_INTEL_long_composites"
+ ; CHECK-SPIRV-DAG: Decorate [[First:[0-9]+]] SpecId  0
+ ; CHECK-SPIRV-DAG: Decorate [[Last:[0-9]+]] SpecId 65548
+ ; CHECK-SPIRV: TypeInt [[TInt:[0-9]+]] 8
+diff --git a/test/long-constant-array.ll b/test/long-constant-array.ll
+index 415a723..cfef59d 100644
+--- a/test/long-constant-array.ll
++++ b/test/long-constant-array.ll
+@@ -1,16 +1,16 @@
+ ; RUN: llvm-as %s -o %t.bc
+ ; RUN: not llvm-spirv %t.bc -o %t.spv 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+ 
+-; Check that everything is fine if SPV_INTEL_long_constant_composite is enabled
+-; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_constant_composite %t.bc -o %t.spv
++; Check that everything is fine if SPV_INTEL_long_composites is enabled
++; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_composites %t.bc -o %t.spv
+ ; RUN: llvm-spirv %t.spv --to-text -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+ ; RUN: llvm-spirv -r -emit-opaque-pointers %t.spv -o %t.rev.bc
+ ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
+ ; TODO: run validator once it supports the extension
+ ; RUNx: spirv-val %t.spv
+ 
+-; CHECK-SPIRV: Capability LongConstantCompositeINTEL 
+-; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
++; CHECK-SPIRV: Capability LongCompositesINTEL
++; CHECK-SPIRV: Extension "SPV_INTEL_long_composites"
+ ; CHECK-SPIRV: TypeInt [[TInt:[0-9]+]] 8
+ ; CHECK-SPIRV: Constant {{[0-9]+}} [[ArrSize:[0-9]+]] 78000
+ ; CHECK-SPIRV: TypeArray [[TArr:[0-9]+]] [[TInt]] [[ArrSize]]
+diff --git a/test/long-type-struct.ll b/test/long-type-struct.ll
+index 9b83f62..de6352a 100644
+--- a/test/long-type-struct.ll
++++ b/test/long-type-struct.ll
+@@ -1,8 +1,8 @@
+ ; RUN: llvm-as %s -o %t.bc
+-; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_constant_composite %t.bc -o %t.spv
++; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_composites %t.bc -o %t.spv
+ ; RUN: llvm-spirv %t.spv --to-text -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+ ; RUN: llvm-spirv -r -emit-opaque-pointers %t.spv -o %t.rev.bc
+-; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_constant_composite -spirv-text %t.rev.bc -o %t2.spt
++; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_long_composites -spirv-text %t.rev.bc -o %t2.spt
+ ; RUN: FileCheck --input-file=%t2.spt %s --check-prefix=CHECK-SPIRV
+ ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
+ ; TODO: run validator once it supports the extension
+@@ -10,8 +10,8 @@
+ 
+ ; RUN: not llvm-spirv %t.bc -o %t.spv 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+ 
+-; CHECK-SPIRV: Capability LongConstantCompositeINTEL 
+-; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
++; CHECK-SPIRV: Capability LongCompositesINTEL
++; CHECK-SPIRV: Extension "SPV_INTEL_long_composites"
+ ; CHECK-SPIRV: TypeInt [[TInt:[0-9]+]] 8
+ ; CHECK-SPIRV: TypePointer [[TIntPtr:[0-9]+]] 8 [[TInt]]
+ ; CHECK-SPIRV: TypeArray [[TArr:[0-9]+]]
diff --git a/dev-util/spirv-llvm-translator/spirv-llvm-translator-17.0.0.ebuild b/dev-util/spirv-llvm-translator/spirv-llvm-translator-17.0.0-r1.ebuild
index 5f258190d543..31e879a61af7 100644
--- a/dev-util/spirv-llvm-translator/spirv-llvm-translator-17.0.0.ebuild
+++ b/dev-util/spirv-llvm-translator/spirv-llvm-translator-17.0.0-r1.ebuild
@@ -1,4 +1,4 @@
-# Copyright 1999-2023 Gentoo Authors
+# Copyright 1999-2024 Gentoo Authors
 # Distributed under the terms of the GNU General Public License v2
 
 EAPI=8
@@ -35,6 +35,8 @@ BDEPEND="
 	)
 "
 
+PATCHES=( "${FILESDIR}/${PN}-17.0.0-intel-capability.patch" )
+
 src_prepare() {
 	append-flags -fPIC
 	cmake_src_prepare