diff options
author | V3n3RiX <venerix@koprulu.sector> | 2024-02-15 11:36:40 +0000 |
---|---|---|
committer | V3n3RiX <venerix@koprulu.sector> | 2024-02-15 11:36:40 +0000 |
commit | dce60e5aa0a12ccc07c10a0a2c3f8f063393b32a (patch) | |
tree | 0eeb9e8b3fe27be09da968f4c1d3e02ad5d8167d /dev-util/intel_clc | |
parent | 4a480f0f8da23a70c88c65a5c218926670f5a870 (diff) |
gentoo auto-resync : 15:02:2024 - 11:36:40
Diffstat (limited to 'dev-util/intel_clc')
-rw-r--r-- | dev-util/intel_clc/Manifest | 2 | ||||
-rw-r--r-- | dev-util/intel_clc/intel_clc-24.0.1.ebuild | 86 |
2 files changed, 88 insertions, 0 deletions
diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest index 1e0b7463431c..afbc2f70c97c 100644 --- a/dev-util/intel_clc/Manifest +++ b/dev-util/intel_clc/Manifest @@ -3,10 +3,12 @@ DIST mesa-23.3.3.tar.xz 19379484 BLAKE2B 6b57e99356abccf398c5fb84953fc1490ddf516 DIST mesa-23.3.4.tar.xz 19415668 BLAKE2B 85687793853675a43da5135f41d0512cb4729f3dd824e2ad28d9bda129258adb00dd7da1e75e76cae71c1148e6a2ede84e1efda640c11aff233e5e12b0cea554 SHA512 026c424989a594dd840dc158ca09e0f57e604f0b1bd2a3981110b4b2b5a47c6cd9c7241c7f48957a781e2dd9f9760cc9db79b2fb7c7fe39b64eddb18dcf18412 DIST mesa-23.3.5.tar.xz 19429564 BLAKE2B 69c7434ae9c503c14b5bf9abad9a3a26a1dd402461b098dcdb01b9da7a7e8652f897fd9681c809aa70d3ace77c448289d22400deca3854844a355eb0ac095583 SHA512 1ad29f524caee0000ef51abe58d29d9687de5fbc5168f7e677bb4e69c5e9a94918d5fbf6e10c6757fe7ce6d47bab109e452f0fa2e26aad2e6f8bfb744383b5ea DIST mesa-24.0.0.tar.xz 19875824 BLAKE2B e15b14e921a6d1c8d1b183b8f7302d13aa81401d9485742846b8b70e2353825bcf0a0e1ee1849831eb43e5836a108cb3cf68bfe0d9183a78684dbd2fac637ab7 SHA512 9dfdea7cebb37b9c020335e24194b39b399f48b5af6eec30c3455108276ac4e29e7b06df942cb2abc7afa667784968c0c43d19b9afe30ef03021b9cb6a789f15 +DIST mesa-24.0.1.tar.xz 19950992 BLAKE2B 05eb98f2fec0d15e63e8da2ca2e563d0b6fb7e29d639e66fc69074b7550939160e6f29121b80f2c64083625f2b13aa728221443b1f5adf2dd0fd92056ed9dc40 SHA512 1eaff5dcff8dd314b2dfe249d25db68d530d3f0fb54e926999768d0a48aa34b67c31ec3587bb2a7d1969845b26e79a4d87aceb7a141fd2e811ae0c47c00b0963 EBUILD intel_clc-23.3.1-r1.ebuild 2517 BLAKE2B 8cac945e2d7eef64a323e23370929f8405f343605efc9626c2cb0a93bba81e11292a251813e4b6046b8808183a803e4ccc6b291c4fbebd43e2db91257bdcea2c SHA512 2ecd6ed2217a414e7b2a6ca4c5d94b86fc388680a2ad3f76bca09fb6f217049330d550e3f1835415711157bfcdf29112da8f4058a87f9b7bc68ab603462e7d56 EBUILD intel_clc-23.3.3.ebuild 2518 BLAKE2B e743dd64646d7ff479af1b9c71694e74a40eddcfc3f83400149e49d73c8af3cfba3dc67197b8bc2fb6c98b0f3604ce91ae7515c04d84ca8072bee9e5f1f5af5d SHA512 4ca6ab59227402ab4e2fc13cb340770efbfc77e66e22cea143b619370a473317cf73a59c298c9cd1d935de4c5f93bf55382418fcc51fb573c1e3de6c760c1f90 EBUILD intel_clc-23.3.4.ebuild 2518 BLAKE2B e743dd64646d7ff479af1b9c71694e74a40eddcfc3f83400149e49d73c8af3cfba3dc67197b8bc2fb6c98b0f3604ce91ae7515c04d84ca8072bee9e5f1f5af5d SHA512 4ca6ab59227402ab4e2fc13cb340770efbfc77e66e22cea143b619370a473317cf73a59c298c9cd1d935de4c5f93bf55382418fcc51fb573c1e3de6c760c1f90 EBUILD intel_clc-23.3.5.ebuild 2518 BLAKE2B e743dd64646d7ff479af1b9c71694e74a40eddcfc3f83400149e49d73c8af3cfba3dc67197b8bc2fb6c98b0f3604ce91ae7515c04d84ca8072bee9e5f1f5af5d SHA512 4ca6ab59227402ab4e2fc13cb340770efbfc77e66e22cea143b619370a473317cf73a59c298c9cd1d935de4c5f93bf55382418fcc51fb573c1e3de6c760c1f90 EBUILD intel_clc-24.0.0.ebuild 1742 BLAKE2B 81f2fcffb6adfcd90b9f0c74f88e4d0d76eb343f6d32cd89bc2eb3e73ae3a858ba464d82c88da761c377630f6746c16ceea7f5a1a915e3d71348706fcd2971f2 SHA512 51d13df9a6f20642f23f0590a6f3814b4b9c8accebe327ff97ac13f47958cebd3096b5566c6016c907e2e060284022dbc926a7bb744a184ffcb42f88d6f0de34 +EBUILD intel_clc-24.0.1.ebuild 1742 BLAKE2B 81f2fcffb6adfcd90b9f0c74f88e4d0d76eb343f6d32cd89bc2eb3e73ae3a858ba464d82c88da761c377630f6746c16ceea7f5a1a915e3d71348706fcd2971f2 SHA512 51d13df9a6f20642f23f0590a6f3814b4b9c8accebe327ff97ac13f47958cebd3096b5566c6016c907e2e060284022dbc926a7bb744a184ffcb42f88d6f0de34 EBUILD intel_clc-9999.ebuild 1742 BLAKE2B 81f2fcffb6adfcd90b9f0c74f88e4d0d76eb343f6d32cd89bc2eb3e73ae3a858ba464d82c88da761c377630f6746c16ceea7f5a1a915e3d71348706fcd2971f2 SHA512 51d13df9a6f20642f23f0590a6f3814b4b9c8accebe327ff97ac13f47958cebd3096b5566c6016c907e2e060284022dbc926a7bb744a184ffcb42f88d6f0de34 MISC metadata.xml 388 BLAKE2B 0558cfe706987a93605fb383bc2c30ff4f4cf5837ca19afd3e16d9702ea7dcd3d575579d53aacb531e1d421c8b1692eb4607d713793a89240223c031d7781a31 SHA512 e0375912a94fa92b49ed78d9a88c4eacc8b441d8b2fa117a48df2d8a958f1cf91279299aca109e24f76b27ca04f0067f83e5b8e4141f85ac64d379bca0945d2a diff --git a/dev-util/intel_clc/intel_clc-24.0.1.ebuild b/dev-util/intel_clc/intel_clc-24.0.1.ebuild new file mode 100644 index 000000000000..adb22e32e30a --- /dev/null +++ b/dev-util/intel_clc/intel_clc-24.0.1.ebuild @@ -0,0 +1,86 @@ +# Copyright 2023-2024 Gentoo Authors +# Distributed under the terms of the GNU General Public License v2 + +EAPI=8 + +LLVM_COMPAT=( 16 17 ) +PYTHON_COMPAT=( python3_{10..12} ) + +inherit llvm-r1 meson python-any-r1 + +MY_PV="${PV/_/-}" + +DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V" +HOMEPAGE="https://mesa3d.org/" + +if [[ ${PV} == 9999 ]]; then + S="${WORKDIR}/intel_clc-${MY_PV}" + EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git" + inherit git-r3 +else + S="${WORKDIR}/mesa-${MY_PV}" + SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz" + KEYWORDS="~amd64" +fi + +LICENSE="MIT SGI-B-2.0" +SLOT="0" +IUSE="debug" + +RDEPEND=" + dev-libs/libclc + dev-util/spirv-tools + >=sys-libs/zlib-1.2.8:= + x11-libs/libdrm + $(llvm_gen_dep ' + dev-util/spirv-llvm-translator:${LLVM_SLOT} + sys-devel/clang:${LLVM_SLOT} + sys-devel/llvm:${LLVM_SLOT} + ') +" +DEPEND="${RDEPEND} + dev-libs/expat +" +BDEPEND=" + ${PYTHON_DEPS} + $(python_gen_any_dep ">=dev-python/mako-0.8.0[\${PYTHON_USEDEP}]") + virtual/pkgconfig +" + +python_check_deps() { + python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]" +} + +pkg_setup() { + llvm-r1_pkg_setup + python-any-r1_pkg_setup +} + +src_configure() { + PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig" + + local emesonargs=( + -Dllvm=enabled + -Dshared-llvm=enabled + -Dintel-clc=enabled + + -Dgallium-drivers='' + -Dvulkan-drivers='' + + # Set platforms empty to avoid the default "auto" setting. If + # platforms is empty meson.build will add surfaceless. + -Dplatforms='' + + -Dglx=disabled + -Dlibunwind=disabled + -Dzstd=disabled + + --buildtype $(usex debug debug plain) + -Db_ndebug=$(usex debug false true) + ) + meson_src_configure +} + +src_install() { + dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc +} |