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authorV3n3RiX <venerix@redcorelinux.org>2017-10-09 18:53:29 +0100
committerV3n3RiX <venerix@redcorelinux.org>2017-10-09 18:53:29 +0100
commit4f2d7949f03e1c198bc888f2d05f421d35c57e21 (patch)
treeba5f07bf3f9d22d82e54a462313f5d244036c768 /dev-libs/libatomic_ops/files
reinit the tree, so we can have metadata
Diffstat (limited to 'dev-libs/libatomic_ops/files')
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-1.2-fix-makefile-am-generic.patch19
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc-asm.patch11
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch46
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-1.2-sh4.patch59
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-1.2-x32.patch43
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha4-x32.patch43
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha6-x32.patch46
-rw-r--r--dev-libs/libatomic_ops/files/libatomic_ops-7.4.0-docs.patch19
8 files changed, 286 insertions, 0 deletions
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-1.2-fix-makefile-am-generic.patch b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-fix-makefile-am-generic.patch
new file mode 100644
index 000000000000..7b1f898ef9b6
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-fix-makefile-am-generic.patch
@@ -0,0 +1,19 @@
+diff -u -r a//doc/Makefile.am b//doc/Makefile.am
+--- a//doc/Makefile.am 2005-03-22 00:05:19.000000000 +0200
++++ b//doc/Makefile.am 2010-04-18 20:08:13.000000000 +0300
+@@ -1,3 +1,3 @@
+ # installed documentation
+ #
+-dist_pkgdata_DATA=COPYING LICENSING.txt README.txt COPYING README_stack.txt README_malloc.txt README_win32.txt
++dist_pkgdata_DATA=COPYING LICENSING.txt README.txt README_stack.txt README_malloc.txt README_win32.txt
+diff -u -r a//src/atomic_ops/sysdeps/Makefile.am b//src/atomic_ops/sysdeps/Makefile.am
+--- a//src/atomic_ops/sysdeps/Makefile.am 2005-09-28 02:53:16.000000000 +0300
++++ b//src/atomic_ops/sysdeps/Makefile.am 2010-04-18 20:04:03.000000000 +0300
+@@ -25,7 +25,6 @@
+ README \
+ \
+ gcc/alpha.h gcc/arm.h gcc/x86.h \
+- gcc/hppa.h gcc/ia64.h \
+ gcc/powerpc.h gcc/sparc.h \
+ gcc/hppa.h gcc/m68k.h gcc/s390.h \
+ gcc/ia64.h gcc/x86_64.h gcc/cris.h \
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc-asm.patch b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc-asm.patch
new file mode 100644
index 000000000000..41171ed86e69
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc-asm.patch
@@ -0,0 +1,11 @@
+--- src/atomic_ops/sysdeps/gcc/powerpc.h 2006-03-29 09:49:14.000000000 +1100
++++ src/atomic_ops/sysdeps/gcc/powerpc.h 2007-08-27 10:51:00.000000000 +1000
+@@ -72,7 +72,7 @@
+ /* registers. I always got "impossible constraint" when I */
+ /* tried the "y" constraint. */
+ __asm__ __volatile__ (
+- "lwz %0,%1\n"
++ "lwz%X1 %0,%1\n"
+ "cmpw cr7,%0,%0\n"
+ "bne- cr7,1f\n"
+ "1: isync\n"
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch
new file mode 100644
index 000000000000..9b6baa188cf7
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-ppc64-load_acquire.patch
@@ -0,0 +1,46 @@
+--- src/atomic_ops/sysdeps/gcc/powerpc.h.orig 2006-03-28 22:49:14.000000000 +0000
++++ src/atomic_ops/sysdeps/gcc/powerpc.h 2007-06-08 23:10:07.000000000 +0000
+@@ -63,6 +63,8 @@
+ /* seems to be that a data dependent branch followed by an isync is */
+ /* cheaper. And the documentation is fairly explicit that this also */
+ /* has acquire semantics. */
++/* ppc64 uses ld not lwz */
++#if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__)
+ AO_INLINE AO_t
+ AO_load_acquire(volatile AO_t *addr)
+ {
+@@ -72,7 +74,7 @@
+ /* registers. I always got "impossible constraint" when I */
+ /* tried the "y" constraint. */
+ __asm__ __volatile__ (
+- "lwz %0,%1\n"
++ "ld %0,%1\n"
+ "cmpw cr7,%0,%0\n"
+ "bne- cr7,1f\n"
+ "1: isync\n"
+@@ -80,7 +82,25 @@
+ : "m"(*addr) : "memory", "cc");
+ return result;
+ }
++#else
++AO_INLINE AO_t
++AO_load_acquire(volatile AO_t *addr)
++{
++ AO_t result;
+
++ /* FIXME: We should get gcc to allocate one of the condition */
++ /* registers. I always got "impossible constraint" when I */
++ /* tried the "y" constraint. */
++ __asm__ __volatile__ (
++ "lwz %0,%1\n"
++ "cmpw cr7,%0,%0\n"
++ "bne- cr7,1f\n"
++ "1: isync\n"
++ : "=r" (result)
++ : "m"(*addr) : "memory", "cc");
++ return result;
++}
++#endif
+ #define AO_HAVE_load_acquire
+
+ /* We explicitly specify store_release, since it relies */
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-1.2-sh4.patch b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-sh4.patch
new file mode 100644
index 000000000000..4e8dd66a3554
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-sh4.patch
@@ -0,0 +1,59 @@
+--- libatomic_ops/src/atomic_ops.h
++++ libatomic_ops/src/atomic_ops.h
+@@ -228,6 +228,10 @@
+ # if defined(__cris__) || defined(CRIS)
+ # include "atomic_ops/sysdeps/gcc/cris.h"
+ # endif
++# if defined(__sh__) || defined(SH4)
++# include "atomic_ops/sysdeps/gcc/sh.h"
++# define AO_CAN_EMUL_CAS
++# endif /* __sh__ */
+ #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */
+
+ #if defined(__INTEL_COMPILER) && !defined(AO_USE_PTHREAD_DEFS)
+only in patch2:
+unchanged:
+--- libatomic_ops/src/atomic_ops/sysdeps/Makefile.am
++++ libatomic_ops/src/atomic_ops/sysdeps/Makefile.am
+@@ -29,6 +29,7 @@
+ gcc/powerpc.h gcc/sparc.h \
+ gcc/hppa.h gcc/m68k.h gcc/s390.h \
+ gcc/ia64.h gcc/x86_64.h gcc/cris.h \
++ gcc/sh.h \
+ \
+ icc/ia64.h \
+ \
+--- libatomic_ops/src/atomic_ops/sysdeps/gcc/sh.h
++++ libatomic_ops/src/atomic_ops/sysdeps/gcc/sh.h
+@@ -0,0 +1,31 @@
++/*
++ * Copyright (c) 2009 by Takashi YOSHII. All rights reserved.
++ *
++ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
++ * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
++ *
++ * Permission is hereby granted to use or copy this program
++ * for any purpose, provided the above notices are retained on all copies.
++ * Permission to modify the code and to distribute modified code is granted,
++ * provided the above notices are retained, and a notice that the code was
++ * modified is included with the above copyright notice.
++ */
++
++#include "../all_atomic_load_store.h"
++#include "../ordered.h"
++
++/* sh has tas.b(byte) only */
++#include "../test_and_set_t_is_char.h"
++
++AO_INLINE AO_TS_VAL_t
++AO_test_and_set_full(volatile AO_TS_t *addr)
++{
++ int oldval;
++ __asm__ __volatile__(
++ "tas.b @%1; movt %0"
++ : "=r" (oldval)
++ : "r" (addr)
++ : "t", "memory");
++ return oldval? AO_TS_CLEAR : AO_TS_SET;
++}
++#define AO_HAVE_test_and_set_full
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-1.2-x32.patch b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-x32.patch
new file mode 100644
index 000000000000..2edc6958f360
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-1.2-x32.patch
@@ -0,0 +1,43 @@
+http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=e3a384578f677c05d812d99c2c92aa13670bd06a
+
+Upstream-Status: Pending
+
+Remove the `q' suffix on x86-64 atomic instructions.
+
+We don't need the `q' suffix on x86_64 atomic instructions for AO_t,
+which is defined as "unsigned long". "unsigned long" is 32bit for x32
+and 64bit for x86-64. The register operand in x86-64 atomic instructions
+is sufficient to properly determine the register size.
+
+Received this patch from H.J. Lu <hjl.tools@gmail.com>
+Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/12/02
+
+--- libatomic_ops-1.2/src/atomic_ops/sysdeps/gcc/x86_64.h.x32 2005-09-28 17:16:38.000000000 -0700
++++ libatomic_ops-1.2/src/atomic_ops/sysdeps/gcc/x86_64.h 2011-12-02 09:29:54.265251875 -0800
+@@ -60,7 +60,7 @@ AO_fetch_and_add_full (volatile AO_t *p,
+ {
+ AO_t result;
+
+- __asm__ __volatile__ ("lock; xaddq %0, %1" :
++ __asm__ __volatile__ ("lock; xadd %0, %1" :
+ "=r" (result), "=m" (*p) : "0" (incr), "m" (*p)
+ : "memory");
+ return result;
+@@ -111,7 +111,7 @@ AO_int_fetch_and_add_full (volatile unsi
+ AO_INLINE void
+ AO_or_full (volatile AO_t *p, AO_t incr)
+ {
+- __asm__ __volatile__ ("lock; orq %1, %0" :
++ __asm__ __volatile__ ("lock; or %1, %0" :
+ "=m" (*p) : "r" (incr), "m" (*p) : "memory");
+ }
+
+@@ -136,7 +136,7 @@ AO_compare_and_swap_full(volatile AO_t *
+ AO_t old, AO_t new_val)
+ {
+ char result;
+- __asm__ __volatile__("lock; cmpxchgq %3, %0; setz %1"
++ __asm__ __volatile__("lock; cmpxchg %3, %0; setz %1"
+ : "=m"(*addr), "=q"(result)
+ : "m"(*addr), "r" (new_val), "a"(old) : "memory");
+ return (int) result;
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha4-x32.patch b/dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha4-x32.patch
new file mode 100644
index 000000000000..ac2b57fb1722
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha4-x32.patch
@@ -0,0 +1,43 @@
+http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=e3a384578f677c05d812d99c2c92aa13670bd06a
+
+Upstream-Status: Pending
+
+Remove the `q' suffix on x86-64 atomic instructions.
+
+We don't need the `q' suffix on x86_64 atomic instructions for AO_t,
+which is defined as "unsigned long". "unsigned long" is 32bit for x32
+and 64bit for x86-64. The register operand in x86-64 atomic instructions
+is sufficient to properly determine the register size.
+
+Received this patch from H.J. Lu <hjl.tools@gmail.com>
+Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/12/02
+
+--- a/src/atomic_ops/sysdeps/gcc/x86_64.h
++++ b/src/atomic_ops/sysdeps/gcc/x86_64.h
+@@ -56,7 +56,7 @@ AO_fetch_and_add_full (volatile AO_t *p,
+ {
+ AO_t result;
+
+- __asm__ __volatile__ ("lock; xaddq %0, %1" :
++ __asm__ __volatile__ ("lock; xadd %0, %1" :
+ "=r" (result), "=m" (*p) : "0" (incr), "m" (*p)
+ : "memory");
+ return result;
+@@ -106,7 +106,7 @@ AO_int_fetch_and_add_full (volatile unsi
+ AO_INLINE void
+ AO_or_full (volatile AO_t *p, AO_t incr)
+ {
+- __asm__ __volatile__ ("lock; orq %1, %0" :
++ __asm__ __volatile__ ("lock; or %1, %0" :
+ "=m" (*p) : "r" (incr), "m" (*p) : "memory");
+ }
+
+@@ -131,7 +131,7 @@ AO_compare_and_swap_full(volatile AO_t *
+ AO_t old, AO_t new_val)
+ {
+ char result;
+- __asm__ __volatile__("lock; cmpxchgq %3, %0; setz %1"
++ __asm__ __volatile__("lock; cmpxchg %3, %0; setz %1"
+ : "=m"(*addr), "=q"(result)
+ : "m"(*addr), "r" (new_val), "a"(old) : "memory");
+ return (int) result;
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha6-x32.patch b/dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha6-x32.patch
new file mode 100644
index 000000000000..838e4a8d27f1
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-7.2_alpha6-x32.patch
@@ -0,0 +1,46 @@
+Adopted from
+http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=e3a384578f677c05d812d99c2c92aa13670bd06a
+
+Upstream-Status: Pending
+
+Remove the `q' suffix on x86-64 atomic instructions.
+
+We don't need the `q' suffix on x86_64 atomic instructions for AO_t,
+which is defined as "unsigned long". "unsigned long" is 32bit for x32
+and 64bit for x86-64. The register operand in x86-64 atomic instructions
+is sufficient to properly determine the register size.
+
+Received this patch from H.J. Lu <hjl.tools@gmail.com>
+Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/12/02
+
+diff --git a/libatomic_ops/src/atomic_ops/sysdeps/gcc/x86_64.h b/libatomic_ops/src/atomic_ops/sysdeps/gcc/x86_64.h
+index 0f68c1e..3bcde88 100644
+--- a/libatomic_ops/src/atomic_ops/sysdeps/gcc/x86_64.h
++++ b/libatomic_ops/src/atomic_ops/sysdeps/gcc/x86_64.h
+@@ -47,7 +47,7 @@ AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
+ {
+ AO_t result;
+
+- __asm__ __volatile__ ("lock; xaddq %0, %1" :
++ __asm__ __volatile__ ("lock; xadd %0, %1" :
+ "=r" (result), "=m" (*p) : "0" (incr), "m" (*p)
+ : "memory");
+ return result;
+@@ -93,7 +93,7 @@ AO_int_fetch_and_add_full (volatile unsigned int *p, unsigned int incr)
+ AO_INLINE void
+ AO_or_full (volatile AO_t *p, AO_t incr)
+ {
+- __asm__ __volatile__ ("lock; orq %1, %0" :
++ __asm__ __volatile__ ("lock; or %1, %0" :
+ "=m" (*p) : "r" (incr), "m" (*p) : "memory");
+ }
+ #define AO_HAVE_or_full
+@@ -123,7 +123,7 @@ AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val)
+ return (int)__sync_bool_compare_and_swap(addr, old, new_val);
+ # else
+ char result;
+- __asm__ __volatile__("lock; cmpxchgq %3, %0; setz %1"
++ __asm__ __volatile__("lock; cmpxchg %3, %0; setz %1"
+ : "=m" (*addr), "=a" (result)
+ : "m" (*addr), "r" (new_val), "a" (old) : "memory");
+ return (int) result;
diff --git a/dev-libs/libatomic_ops/files/libatomic_ops-7.4.0-docs.patch b/dev-libs/libatomic_ops/files/libatomic_ops-7.4.0-docs.patch
new file mode 100644
index 000000000000..06c03677f605
--- /dev/null
+++ b/dev-libs/libatomic_ops/files/libatomic_ops-7.4.0-docs.patch
@@ -0,0 +1,19 @@
+--- libatomic_ops-7.4.0/doc/Makefile.am
++++ libatomic_ops-7.4.0/doc/Makefile.am
+@@ -1,4 +1,4 @@
+ # installed documentation
+ #
+-dist_pkgdata_DATA=LICENSING.txt README.txt README_stack.txt \
++dist_doc_DATA=README.txt README_stack.txt \
+ README_malloc.txt README_win32.txt
+--- libatomic_ops-7.4.0/Makefile.am
++++ libatomic_ops-7.4.0/Makefile.am
+@@ -6,8 +6,6 @@
+ pkgconfig_DATA = pkgconfig/atomic_ops.pc
+ noinst_DATA = pkgconfig/atomic_ops-uninstalled.pc
+
+-dist_pkgdata_DATA = COPYING README.md
+-
+ EXTRA_DIST = autogen.sh
+
+ #distclean-local: