diff options
Diffstat (limited to 'sys-kernel/linux-image-redcore-lts/files/5.10-k10temp-fix-ZEN2-desktop-add-ZEN3-desktop.patch')
| -rw-r--r-- | sys-kernel/linux-image-redcore-lts/files/5.10-k10temp-fix-ZEN2-desktop-add-ZEN3-desktop.patch | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/sys-kernel/linux-image-redcore-lts/files/5.10-k10temp-fix-ZEN2-desktop-add-ZEN3-desktop.patch b/sys-kernel/linux-image-redcore-lts/files/5.10-k10temp-fix-ZEN2-desktop-add-ZEN3-desktop.patch new file mode 100644 index 00000000..ed381bfa --- /dev/null +++ b/sys-kernel/linux-image-redcore-lts/files/5.10-k10temp-fix-ZEN2-desktop-add-ZEN3-desktop.patch @@ -0,0 +1,94 @@ +diff -Naur linux-5.10.2/drivers/hwmon/k10temp.c linux-5.10.2-p/drivers/hwmon/k10temp.c +--- linux-5.10.2/drivers/hwmon/k10temp.c 2020-12-21 13:30:08.000000000 +0100 ++++ linux-5.10.2-p/drivers/hwmon/k10temp.c 2020-12-22 18:15:23.686670195 +0100 +@@ -87,17 +87,28 @@ + /* F17h thermal registers through SMN */ + #define F17H_M01H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0xc) + #define F17H_M01H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) ++/* ZEN2 SP3/TR */ + #define F17H_M31H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x14) + #define F17H_M31H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) + ++/* ZEN2 Ryzen Desktop */ ++#define F17H_M71H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x10) ++#define F17H_M71H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0xc) ++ ++/* fixme: figure these */ + #define F17H_M01H_CFACTOR_ICORE 1000000 /* 1A / LSB */ + #define F17H_M01H_CFACTOR_ISOC 250000 /* 0.25A / LSB */ + #define F17H_M31H_CFACTOR_ICORE 1000000 /* 1A / LSB */ + #define F17H_M31H_CFACTOR_ISOC 310000 /* 0.31A / LSB */ + + /* F19h thermal registers through SMN */ +-#define F19H_M01_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x14) +-#define F19H_M01_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) ++/* ZEN3 SP3/TR */ ++#define F19H_M01H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x14) ++#define F19H_M01H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) ++ ++/* ZEN3 Ryzen Desktop */ ++#define F19H_M21H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x10) ++#define F19H_M21H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0xc) + + #define F19H_M01H_CFACTOR_ICORE 1000000 /* 1A / LSB */ + #define F19H_M01H_CFACTOR_ISOC 310000 /* 0.31A / LSB */ +@@ -513,6 +524,7 @@ + data->is_zen = true; + + switch (boot_cpu_data.x86_model) { ++ /* FIXME: those looks wrong too */ + case 0x1: /* Zen */ + case 0x8: /* Zen+ */ + case 0x11: /* Zen APU */ +@@ -524,8 +536,7 @@ + data->cfactor[1] = F17H_M01H_CFACTOR_ISOC; + k10temp_get_ccd_support(pdev, data, 4); + break; +- case 0x31: /* Zen2 Threadripper */ +- case 0x71: /* Zen2 */ ++ case 0x31: /* Zen2 SP3/TR */ + data->show_current = !is_threadripper() && !is_epyc(); + data->cfactor[0] = F17H_M31H_CFACTOR_ICORE; + data->cfactor[1] = F17H_M31H_CFACTOR_ISOC; +@@ -533,6 +544,14 @@ + data->svi_addr[1] = F17H_M31H_SVI_TEL_PLANE1; + k10temp_get_ccd_support(pdev, data, 8); + break; ++ case 0x71: /* ZEN2 Ryzen Desktop */ ++ data->show_current = true; ++ data->cfactor[0] = F17H_M31H_CFACTOR_ICORE; ++ data->cfactor[1] = F17H_M31H_CFACTOR_ISOC; ++ data->svi_addr[0] = F17H_M71H_SVI_TEL_PLANE0; ++ data->svi_addr[1] = F17H_M71H_SVI_TEL_PLANE1; ++ k10temp_get_ccd_support(pdev, data, 4); ++ break; + } + } else if (boot_cpu_data.x86 == 0x19) { + data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK; +@@ -541,14 +560,23 @@ + data->is_zen = true; + + switch (boot_cpu_data.x86_model) { +- case 0x0 ... 0x1: /* Zen3 */ ++ case 0x0 ... 0x1: /* Zen3 SP3/TR */ + data->show_current = true; +- data->svi_addr[0] = F19H_M01_SVI_TEL_PLANE0; +- data->svi_addr[1] = F19H_M01_SVI_TEL_PLANE1; ++ data->svi_addr[0] = F19H_M01H_SVI_TEL_PLANE0; ++ data->svi_addr[1] = F19H_M01H_SVI_TEL_PLANE1; + data->cfactor[0] = F19H_M01H_CFACTOR_ICORE; + data->cfactor[1] = F19H_M01H_CFACTOR_ISOC; + k10temp_get_ccd_support(pdev, data, 8); + break; ++ case 0x21: /* ZEN3 Ryzen Desktop */ ++ data->show_current = true; ++ data->svi_addr[0] = F19H_M21H_SVI_TEL_PLANE0; ++ data->svi_addr[1] = F19H_M21H_SVI_TEL_PLANE1; ++ data->cfactor[0] = F19H_M01H_CFACTOR_ICORE; ++ data->cfactor[1] = F19H_M01H_CFACTOR_ISOC; ++ k10temp_get_ccd_support(pdev, data, 2); ++ break; ++ + } + } else { + data->read_htcreg = read_htcreg_pci; |