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| author | V3n3RiX <venerix@redcorelinux.org> | 2018-01-07 19:14:06 +0000 |
|---|---|---|
| committer | V3n3RiX <venerix@redcorelinux.org> | 2018-01-07 19:14:06 +0000 |
| commit | 0c3540ab69f6ea4d82d6fa53b1255faa017961cd (patch) | |
| tree | 26d249454557bcc27ea2224cd90443be32330fac /profiles/desc/cpu_flags_arm.desc | |
| parent | 9e9d1bddd020bfc7d2d4182d01d94128f99bb1bf (diff) | |
resync redcore profile
Diffstat (limited to 'profiles/desc/cpu_flags_arm.desc')
| -rw-r--r-- | profiles/desc/cpu_flags_arm.desc | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/profiles/desc/cpu_flags_arm.desc b/profiles/desc/cpu_flags_arm.desc new file mode 100644 index 00000000..cddc9f29 --- /dev/null +++ b/profiles/desc/cpu_flags_arm.desc @@ -0,0 +1,21 @@ +# Copyright 1999-2017 Gentoo Foundation. +# Distributed under the terms of the GNU General Public License v2 + +aes - Use the AES cryptography instruction set +crc32 - Use the CRC32 instruction set +edsp - Use the enhanced DSP instructions (ARMv*E and ARMv6+) +iwmmxt - Use the iwMMXt instruction set +neon - Use the NEON (ASIMD) instruction set +sha1 - Use the SHA-1 cryptography instruction set +sha2 - Use the SHA-2 cryptography instruction set +thumb - Enable Thumb instruction set (ARMv*T and ARMv6+) +thumb2 - Enable Thumb-2 instruction set (ARMv*T2 and ARMv7+) +v4 - Use instructions added in ARMv4 +v5 - Use instructions added in ARMv5 +v6 - Use instructions added in ARMv6 +v7 - Use instructions added in ARMv7 +v8 - Use instructions added in ARMv8 +vfp - Use the VFP version 2 instruction set +vfpv3 - Use the VFP version 3 instruction set +vfpv4 - Use the VFP version 4 instruction set +vfp-d32 - Indicate that the FPU has 32 64-bit VFP (v3+) registers (16 otherwise) |