blob: a1909c76d60931bed2dd68c25370facda93fb12b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
|
BDEPEND=dev-util/gperf app-alternatives/yacc app-alternatives/lex sys-devel/gnuconfig >=app-portage/elt-patches-20170815 || ( >=dev-build/automake-1.16.5:1.16 ) || ( >=dev-build/autoconf-2.72-r1:2.72 >=dev-build/autoconf-2.71-r6:2.71 ) >=dev-build/libtool-2.4.7
DEFINED_PHASES=install prepare
DEPEND=sys-libs/readline:= sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=8
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
INHERIT=autotools
IUSE=examples
KEYWORDS=amd64 ~arm ~arm64 ~ppc ~ppc64 ~riscv ~x86
LICENSE=LGPL-2.1
RDEPEND=sys-libs/readline:= sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/steveicarus/iverilog/archive/v10_3.tar.gz -> iverilog-10.3.tar.gz
_eclasses_=autotools e4cf390b19033d5ca443765bc8537b81 gnuconfig b6b3e92f8b8c996400074b5f61a59256 libtool 9d3a9a889a6fa62ae794f817c156491b multilib c19072c3cd7ac5cb21de013f7e9832e0 toolchain-funcs e56c7649b804f051623c8bc1a1c44084
_md5_=cb0738721dd2e6964f211e0712bf2d93
|
