summaryrefslogtreecommitdiff
path: root/metadata/md5-cache/sci-electronics/iverilog-10.3
blob: 258ce6ee18ac21f6740d40e3ebd49363292a1ae7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BDEPEND=sys-devel/gnuconfig >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.4:1.16 ) >=sys-devel/autoconf-2.71 >=sys-devel/libtool-2.4
DEFINED_PHASES=install prepare
DEPEND=dev-util/gperf sys-devel/bison sys-devel/flex sys-libs/readline:0 sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=7
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
IUSE=examples
KEYWORDS=~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 sparc x86
LICENSE=LGPL-2.1
RDEPEND=sys-libs/readline:0 sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/steveicarus/iverilog/archive/v10_3.tar.gz -> iverilog-10.3.tar.gz
_eclasses_=autotools	6cc26735fa9dd59e8c62880beda05b6e	gnuconfig	262062cef0ba4f22b397193da514a350	libtool	241a8f577b9781a42a7421e53448a44e	multilib	de4beb52bfa93c4c5d96792a6b5e1784	toolchain-funcs	badd6e329e1f3e6bee99b35bf8763ce8
_md5_=96c538c9df2de9cdffc0e7ee3aafe67d