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DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://iverilog.icarus.com/
IUSE=examples
KEYWORDS=amd64 ppc sparc x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.6.tar.gz
_eclasses_=desktop 7fd20552ce4cc97e8acb132a499a7dd8 epatch ed88001f77c6dd0d5f09e45c1a5b480e estack 686eaab303305a908fd57b2fd7617800 eutils fcb2aa98e1948b835b5ae66ca52868c5 ltprune 2729691420b6deeda2a90b1f1183fb55 multilib 2477ebe553d3e4d2c606191fe6c33602 preserve-libs ef207dc62baddfddfd39a164d9797648 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb vcs-clean 2a0f74a496fa2b1552c4f3398258b7bf
_md5_=6c390db9e7a005dbbc244949cbec6e42
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