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authorV3n3RiX <venerix@koprulu.sector>2023-07-08 22:23:22 +0100
committerV3n3RiX <venerix@koprulu.sector>2023-07-08 22:23:22 +0100
commit99b2c44c1425c7b2925846d4c44b2bf2f78dc786 (patch)
tree9bf7a2d385aace0ea5f3f8d3e3657168b758fdaa /sci-libs/openblas
parent39bccce90513402ec93bb0fde30678f16b07a9cc (diff)
gentoo auto-resync : 08:07:2023 - 22:23:22
Diffstat (limited to 'sci-libs/openblas')
-rw-r--r--sci-libs/openblas/Manifest2
-rw-r--r--sci-libs/openblas/files/openblas-0.3.20-fix-loong.patch178
-rw-r--r--sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch99
3 files changed, 0 insertions, 279 deletions
diff --git a/sci-libs/openblas/Manifest b/sci-libs/openblas/Manifest
index d0c4830ba3a5..f00a81968dd9 100644
--- a/sci-libs/openblas/Manifest
+++ b/sci-libs/openblas/Manifest
@@ -1,6 +1,4 @@
AUX openblas-0.3.12-shared-blas-lapack.patch 2008 BLAKE2B 2d3a4a90d8144cbf149b7711b67364176a94287f26448930b5a4fd29fe761fb250e9007c580fb1ffa8148c477e2f4057f9cd8d7aa07efeb85caa842802d358fd SHA512 3f0d4b480549565c838eba6371e0990c162f56a226f9d26e1639e012ae3f39809f8c6badcf8fdfbb1258f45367dbaff9c4c611b8b44bac27d341aea954f0133e
-AUX openblas-0.3.20-fix-loong.patch 5694 BLAKE2B 0d4eb185ead0a47855e411670816aaf52e22530160cc2b29c7eca8a077d7bfb49a501d154c7492a259287efbd6dd24496f53d91cb834a97b2fec441d3dd06cf1 SHA512 1e90165549bc0a441003cf7bc0b1fa3e2af6eaaaad92ab5aca0d3f9569976184cbe653a049c26e81f016cf66152ac9903f619a990f54613fe3f091eb94fd742f
-AUX openblas-0.3.20-fix-riscv.patch 3786 BLAKE2B 5ba65c1f44aa8cd8f1b88458dfe16ef32bfd92260bed2b3b60596a16c9778a94b7c03752f41ad649ba1742c72b7528768fa51fcf30639c2bc0064ad132b0d747 SHA512 aec236b9d6fa9c80cef6401cf43e594cb17c73137cfcc17286046d8d85bb6a5bb6367b808a8b85152313cb596919de0173812832037ba88e4e39b722e4a8d2e1
AUX openblas-0.3.21-clang16.patch 17596 BLAKE2B 29a6d2716e31ad65de3252375c1a11b769c59924d09df190fd458a85dcb4c03fda041255b4239b6f41b9b799805e67bf4940f93e5baced5674eacb141eb6f711 SHA512 2e488295b282a267f5a49aa077331cfd2b35552d6099d22d8f37beb5521ebc1d4d08ba512b3b6d863f42a5f1c25153c74d83dc56be687f32e095fe1ff248bef6
AUX openblas-0.3.21-fix-loong.patch 7341 BLAKE2B 33bd86e61b8a9d5d7130a4dd3a2d03f2e4ddd9703a3c2d6cf8e31e0af7499ea6128a1b7979f0a347b813292af2dca507d9b06e9ced6ab4e821d5f33ee03e5054 SHA512 c1c19e8965794658baff61bdc9082981b9e69b487c4221837ef10f176b12ee152bad0e37bbd0c347722ee2daf83adb016e75b149dad2b140ad4c631646290642
AUX openblas-0.3.23-shared-blas-lapack.patch 2128 BLAKE2B 42e6ac46c9d62609731e3d7efd57569712325fb4f35b0bc1b119f51babf9b728acc569216c784e30980e20accee70baee20850b5600c7e0800ff04f19415cf08 SHA512 c6358b9682e358082bd862bbc376412c5b33bc967153f544fa2514205bcb4841cfbbc61e93932fcd4b0653ded2d5f853d62ac05081fc970fb541f4cc7281768f
diff --git a/sci-libs/openblas/files/openblas-0.3.20-fix-loong.patch b/sci-libs/openblas/files/openblas-0.3.20-fix-loong.patch
deleted file mode 100644
index 2745d26cb3a5..000000000000
--- a/sci-libs/openblas/files/openblas-0.3.20-fix-loong.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-https://github.com/xianyi/OpenBLAS/pull/3626, rebased on top of v0.3.20.
-
-From: WANG Xuerui <xen0n@gentoo.org>
-Date: Fri, 13 May 2022 15:26:33 +0800
-Subject: [PATCH 1/3] Move LoongArch make rules to Makefile.loongarch64
-
---- a/Makefile.loongarch64
-+++ b/Makefile.loongarch64
-@@ -1,3 +1,4 @@
--ifdef BINARY64
--else
-+ifeq ($(CORE), LOONGSON3R5)
-+CCOMMON_OPT += -march=loongarch64 -mabi=lp64
-+FCOMMON_OPT += -march=loongarch64 -mabi=lp64
- endif
---- a/Makefile.system
-+++ b/Makefile.system
-@@ -886,13 +886,6 @@ ifeq ($(OSNAME), AIX)
- BINARY_DEFINED = 1
- endif
-
--ifeq ($(ARCH), loongarch64)
--ifeq ($(CORE), LOONGSON3R5)
--CCOMMON_OPT += -march=loongarch64 -mabi=lp64
--FCOMMON_OPT += -march=loongarch64 -mabi=lp64
--endif
--endif
--
- endif
-
- ifndef BINARY_DEFINED
-From: WANG Xuerui <xen0n@gentoo.org>
-Date: Fri, 13 May 2022 15:53:22 +0800
-Subject: [PATCH 2/3] Probe for old-world LASX flavor on LoongArch and use
- generic DGEMM kernel otherwise
-
-See: https://bugs.gentoo.org/844013
---- a/Makefile.system
-+++ b/Makefile.system
-@@ -1683,6 +1683,7 @@ export TARGET_CORE
- export NO_AVX512
- export NO_AVX2
- export BUILD_BFLOAT16
-+export NO_LASX
-
- export SBGEMM_UNROLL_M
- export SBGEMM_UNROLL_N
---- a/c_check
-+++ b/c_check
-@@ -270,6 +270,37 @@ if (($architecture eq "x86") || ($architecture eq "x86_64")) {
- }
- }
-
-+$no_lasx = 0;
-+if (($architecture eq "loongarch64")) {
-+ eval "use File::Temp qw(tempfile)";
-+ if ($@){
-+ warn "could not load PERL module File::Temp, so could not check compiler compatibility with the LoongArch LASX extension";
-+ # Assume no LASX, because currently LASX is only present in vendor
-+ # toolchains, undocumented nor upstreamed.
-+ $no_lasx = 1;
-+ } else {
-+ # Old-world assembly flavor: LASX registers named "$xrNN", different
-+ # from the ISA manual which suggests "$xNN". This is the flavor we
-+ # currently support.
-+ #
-+ # As the LASX ISA manual is not out yet, we cannot predict what the
-+ # new-world flavor would look like, so do not probe flavor for now.
-+ # The compiler flags are also unsuitable for new-world gcc.
-+ ($fh,$tmpf) = tempfile( SUFFIX => '.c' , UNLINK => 1 );
-+ $code = '"xvld $xr0, $a0, 0\n"';
-+ print $fh "int main(void){ __asm__ volatile($code); }\n";
-+ $args = " -march=loongarch64 -mabi=lp64 -mlasx -c -o $tmpf.o $tmpf";
-+ my @cmd = ("$compiler_name $flags $args >/dev/null 2>/dev/null");
-+ system(@cmd) == 0;
-+ if ($? != 0) {
-+ $no_lasx = 1;
-+ } else {
-+ $no_lasx = 0;
-+ }
-+ unlink("$tmpf.o");
-+ }
-+}
-+
- $c11_atomics = 0;
- if ($data =~ /HAVE_C11/) {
- eval "use File::Temp qw(tempfile)";
-@@ -393,6 +424,7 @@ print MAKEFILE "HAVE_MSA=1\n" if $have_msa eq 1;
- print MAKEFILE "MSA_FLAGS=$msa_flags\n" if $have_msa eq 1;
- print MAKEFILE "NO_AVX512=1\n" if $no_avx512 eq 1;
- print MAKEFILE "NO_AVX2=1\n" if $no_avx2 eq 1;
-+print MAKEFILE "NO_LASX=1\n" if $no_lasx eq 1;
- print MAKEFILE "OLDGCC=1\n" if $oldgcc eq 1;
-
- $os =~ tr/[a-z]/[A-Z]/;
---- a/kernel/loongarch64/KERNEL.LOONGSON3R5
-+++ b/kernel/loongarch64/KERNEL.LOONGSON3R5
-@@ -1,3 +1,7 @@
-+ifeq ($(NO_LASX), 1)
-+# No LASX support in compiler, unable to consume the optimized version
-+# leave out DGEMMKERNEL to pull in the generic version
-+else
- DGEMMKERNEL = dgemm_kernel_16x4.S
- DGEMMINCOPY = dgemm_ncopy_16.S
- DGEMMITCOPY = dgemm_tcopy_16.S
-@@ -7,6 +11,7 @@ DGEMMINCOPYOBJ = dgemm_incopy.o
- DGEMMITCOPYOBJ = dgemm_itcopy.o
- DGEMMONCOPYOBJ = dgemm_oncopy.o
- DGEMMOTCOPYOBJ = dgemm_otcopy.o
-+endif
-
- DTRSMKERNEL_LN = ../generic/trsm_kernel_LN.c
- DTRSMKERNEL_LT = ../generic/trsm_kernel_LT.c
-From: WANG Xuerui <xen0n@gentoo.org>
-Date: Fri, 13 May 2022 16:23:46 +0800
-Subject: [PATCH 3/3] Fix ABI CFLAGS setting on new-world LoongArch
-
-See: https://bugs.gentoo.org/844013
---- a/Makefile.loongarch64
-+++ b/Makefile.loongarch64
-@@ -1,4 +1,13 @@
- ifeq ($(CORE), LOONGSON3R5)
--CCOMMON_OPT += -march=loongarch64 -mabi=lp64
--FCOMMON_OPT += -march=loongarch64 -mabi=lp64
-+CCOMMON_OPT += -march=loongarch64
-+FCOMMON_OPT += -march=loongarch64
-+
-+ifeq ($(LOONGARCH_CC_FLAVOR), NEW)
-+CCOMMON_OPT += -mabi=lp64d
-+FCOMMON_OPT += -mabi=lp64d
-+endif
-+ifeq ($(LOONGARCH_CC_FLAVOR), OLD)
-+CCOMMON_OPT += -mabi=lp64
-+FCOMMON_OPT += -mabi=lp64
-+endif
- endif
---- a/Makefile.system
-+++ b/Makefile.system
-@@ -1683,6 +1683,7 @@ export TARGET_CORE
- export NO_AVX512
- export NO_AVX2
- export BUILD_BFLOAT16
-+export LOONGARCH_CC_FLAVOR
- export NO_LASX
-
- export SBGEMM_UNROLL_M
---- a/c_check
-+++ b/c_check
-@@ -270,6 +270,21 @@ if (($architecture eq "x86") || ($architecture eq "x86_64")) {
- }
- }
-
-+$loongarch_cc_flavor = "";
-+if (($architecture eq "loongarch64")) {
-+ # Currently there are only 2 flavors: new-world and old-world.
-+ # They differ in ABI names accepted, so check it to avoid creating temp
-+ # files.
-+ $args = " -mabi=lp64d -E -o - /dev/null";
-+ my @cmd = ("$compiler_name $flags $args >/dev/null 2>/dev/null");
-+ system(@cmd) == 0;
-+ if ($? != 0) {
-+ $loongarch_cc_flavor = "OLD";
-+ } else {
-+ $loongarch_cc_flavor = "NEW";
-+ }
-+}
-+
- $no_lasx = 0;
- if (($architecture eq "loongarch64")) {
- eval "use File::Temp qw(tempfile)";
-@@ -424,6 +439,7 @@ print MAKEFILE "HAVE_MSA=1\n" if $have_msa eq 1;
- print MAKEFILE "MSA_FLAGS=$msa_flags\n" if $have_msa eq 1;
- print MAKEFILE "NO_AVX512=1\n" if $no_avx512 eq 1;
- print MAKEFILE "NO_AVX2=1\n" if $no_avx2 eq 1;
-+print MAKEFILE "LOONGARCH_CC_FLAVOR=$loongarch_cc_flavor\n" if $architecture eq "loongarch64";
- print MAKEFILE "NO_LASX=1\n" if $no_lasx eq 1;
- print MAKEFILE "OLDGCC=1\n" if $oldgcc eq 1;
-
diff --git a/sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch b/sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch
deleted file mode 100644
index a386a0b38467..000000000000
--- a/sci-libs/openblas/files/openblas-0.3.20-fix-riscv.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-Bug: https://bugs.gentoo.org/837806
-From https://github.com/xianyi/OpenBLAS/pull/3613
-
-From: Han Gao <gaohan@uniontech.com>
-Date: Wed, 27 Apr 2022 01:34:55 +0800
-Subject: [PATCH 1/2] Fix other arch build in detect.
-
-When CORE is empty, use -march=loongson3a. Fix it.
-
-Signed-off-by: Han Gao <gaohan@uniontech.com>
---- a/Makefile.system
-+++ b/Makefile.system
-@@ -847,7 +847,7 @@ CCOMMON_OPT += -mabi=32
- BINARY_DEFINED = 1
- endif
-
--ifeq ($(CORE), $(filter $(CORE),LOONGSON3R3 LOONGSON3R4))
-+ifneq (, $(filter $(CORE),LOONGSON3R3 LOONGSON3R4))
- CCOMMON_OPT += -march=loongson3a
- FCOMMON_OPT += -march=loongson3a
- endif
-
-From: Han Gao <gaohan@uniontech.com>
-Date: Wed, 27 Apr 2022 02:29:43 +0800
-Subject: [PATCH 2/2] Fix riscv64 arch detect
-
-Signed-off-by: Han Gao <gaohan@uniontech.com>
---- a/cpuid_riscv64.c
-+++ b/cpuid_riscv64.c
-@@ -1,5 +1,5 @@
- /*****************************************************************************
--Copyright (c) 2011-2014, The OpenBLAS Project
-+Copyright (c) 2011-2022, The OpenBLAS Project
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
-@@ -13,9 +13,9 @@ modification, are permitted provided that the following conditions are
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
-- 3. Neither the name of the OpenBLAS project nor the names of
-- its contributors may be used to endorse or promote products
-- derived from this software without specific prior written
-+ 3. Neither the name of the OpenBLAS project nor the names of
-+ its contributors may be used to endorse or promote products
-+ derived from this software without specific prior written
- permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-@@ -70,16 +70,16 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- /* or implied, of The University of Texas at Austin. */
- /*********************************************************************/
-
--#define CPU_UNKNOWN 0
--#define CPU_C910V 1
-+#define CPU_GENERIC 0
-+#define CPU_C910V 1
-
- static char *cpuname[] = {
-- "UNKOWN",
-+ "RISCV64_GENERIC",
- "C910V"
- };
-
- int detect(void){
-- return CPU_UNKNOWN;
-+ return CPU_GENERIC;
- }
-
- char *get_corename(void){
-@@ -98,7 +98,7 @@ void get_subdirname(void){
- }
-
- void get_cpuconfig(void){
-- printf("#define UNKNOWN\n");
-+ printf("#define %s\n", cpuname[detect()]);
- printf("#define L1_DATA_SIZE 65536\n");
- printf("#define L1_DATA_LINESIZE 32\n");
- printf("#define L2_SIZE 512488\n");
---- a/getarch.c
-+++ b/getarch.c
-@@ -1731,7 +1731,7 @@ int main(int argc, char *argv[]){
- #ifdef FORCE
- printf("CORE=%s\n", CORENAME);
- #else
--#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__)
-+#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__) || defined(__riscv)
- printf("CORE=%s\n", get_corename());
- #endif
- #endif
-@@ -1879,7 +1879,7 @@ printf("ELF_VERSION=2\n");
- #ifdef FORCE
- printf("#define CHAR_CORENAME \"%s\"\n", CORENAME);
- #else
--#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__)
-+#if defined(INTEL_AMD) || defined(POWER) || defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(ZARCH) || defined(sparc) || defined(__loongarch__) || defined(__riscv)
- printf("#define CHAR_CORENAME \"%s\"\n", get_corename());
- #endif
- #endif