diff options
| author | V3n3RiX <venerix@redcorelinux.org> | 2019-10-13 22:19:36 +0100 |
|---|---|---|
| committer | V3n3RiX <venerix@redcorelinux.org> | 2019-10-14 23:22:23 +0100 |
| commit | 4b19be30aa626b327c885dae62c559ec0e9fb935 (patch) | |
| tree | 76e74807bc479502e13866b581b6bf86734ec634 /profiles/desc | |
| parent | 30d6f67c98d149508509d5e86f176d558793acc0 (diff) | |
gentoo resync : 13.10.2019
Diffstat (limited to 'profiles/desc')
| -rw-r--r-- | profiles/desc/gpsd_protocols.desc | 1 | ||||
| -rw-r--r-- | profiles/desc/llvm_targets.desc | 8 |
2 files changed, 5 insertions, 4 deletions
diff --git a/profiles/desc/gpsd_protocols.desc b/profiles/desc/gpsd_protocols.desc index d85396bb827c..30e805418afe 100644 --- a/profiles/desc/gpsd_protocols.desc +++ b/profiles/desc/gpsd_protocols.desc @@ -14,6 +14,7 @@ garmin - Garmin protocol support garmintxt - Garmin Simple Text protocol support geostar - Geostar Protocol support gpsclock - GPSclock protocol support +greis - Javad GREIS protocol support isync - Isync protocol support itrax - iTrax protocol support mtk3301 - MTK-3301 protocol support diff --git a/profiles/desc/llvm_targets.desc b/profiles/desc/llvm_targets.desc index 1c65ccad350a..38e123de7968 100644 --- a/profiles/desc/llvm_targets.desc +++ b/profiles/desc/llvm_targets.desc @@ -1,8 +1,9 @@ -# Copyright 1999-2017 Gentoo Foundation. +# Copyright 1999-2019 Gentoo Authors. # Distributed under the terms of the GNU General Public License v2 AArch64 - AArch64 CPU target (arm64 in Gentoo) AMDGPU - AMDGPU target (supports R600 and GCN GPUs) +ARC - ARC (Argonaut RISC Core) embedded CPU target [EXPERIMENTAL] ARM - ARM CPU target AVR - 8-bit Atmel AVR microcontroller target [EXPERIMENTAL] BPF - Berkeley Packet Filter target @@ -10,12 +11,11 @@ Hexagon - Qualcomm Hexagon DSP target Lanai - Lanai CPU target Mips - MIPS CPU target (includes MIPS64) MSP430 - MSP430 CPU target (experimental) -Nios2 - Nios2 CPU target [EXPERIMENTAL] NVPTX - NVIDIA PTX (GPU) target (32-bit and 64-bit) PowerPC - PowerPC CPU target (PPC32 and PPC64) -RISCV - RISC-V CPU target [EXPERIMENTAL] +RISCV - RISC-V CPU target Sparc - Sparc CPU target SystemZ - SystemZ (s390x) CPU target -WebAssembly - WebAssembly backend [EXPERIMENTAL] +WebAssembly - WebAssembly backend X86 - X86 CPU target (includes amd64) XCore - XCore CPU target |