diff options
author | V3n3RiX <venerix@redcorelinux.org> | 2020-09-16 09:32:48 +0100 |
---|---|---|
committer | V3n3RiX <venerix@redcorelinux.org> | 2020-09-16 09:32:48 +0100 |
commit | 9ee6d97c2883d42f204a533a8bc1f4562df778fb (patch) | |
tree | b690ddc0ca30f1472887edbb0b8313629bfcbbb2 /profiles/arch/riscv/rv64gc | |
parent | b17a3ef12038de50228bade1f05502c74e135321 (diff) |
gentoo resync : 16.09.2020
Diffstat (limited to 'profiles/arch/riscv/rv64gc')
-rw-r--r-- | profiles/arch/riscv/rv64gc/lp64/use.mask | 2 | ||||
-rw-r--r-- | profiles/arch/riscv/rv64gc/lp64d/use.mask | 2 | ||||
-rw-r--r-- | profiles/arch/riscv/rv64gc/make.defaults | 25 | ||||
-rw-r--r-- | profiles/arch/riscv/rv64gc/package.mask | 5 | ||||
-rw-r--r-- | profiles/arch/riscv/rv64gc/use.force | 4 | ||||
-rw-r--r-- | profiles/arch/riscv/rv64gc/use.mask | 8 |
6 files changed, 11 insertions, 35 deletions
diff --git a/profiles/arch/riscv/rv64gc/lp64/use.mask b/profiles/arch/riscv/rv64gc/lp64/use.mask index 9f26ae637a8a..1e0176b85cb0 100644 --- a/profiles/arch/riscv/rv64gc/lp64/use.mask +++ b/profiles/arch/riscv/rv64gc/lp64/use.mask @@ -6,3 +6,5 @@ multilib # Mask the other multilib flags back for non-multilib profile. abi_riscv_lp64d +abi_riscv_ilp32d +abi_riscv_ilp32 diff --git a/profiles/arch/riscv/rv64gc/lp64d/use.mask b/profiles/arch/riscv/rv64gc/lp64d/use.mask index fd1d1445c965..101528080621 100644 --- a/profiles/arch/riscv/rv64gc/lp64d/use.mask +++ b/profiles/arch/riscv/rv64gc/lp64d/use.mask @@ -6,3 +6,5 @@ multilib # Mask the other multilib flags back for non-multilib profile. abi_riscv_lp64 +abi_riscv_ilp32d +abi_riscv_ilp32 diff --git a/profiles/arch/riscv/rv64gc/make.defaults b/profiles/arch/riscv/rv64gc/make.defaults index 46206e24f6d4..a5963cb2fcba 100644 --- a/profiles/arch/riscv/rv64gc/make.defaults +++ b/profiles/arch/riscv/rv64gc/make.defaults @@ -2,32 +2,17 @@ # Distributed under the terms of the GNU General Public License v2 # RISC-V profile for rv64gc multilib +# +# This immediate profile is ONLY useful for internal purposes; it can generate +# stages just fine, but the only "hardware" that can run them is qemu-user ... -CFLAGS="-O2 -pipe" -CXXFLAGS="${CFLAGS}" -FFLAGS="${CFLAGS}" -FCFLAGS="${CFLAGS}" +CHOST="riscv64-unknown-linux-gnu" # Multilib ABIs -MULTILIB_ABIS="lp64d lp64" +MULTILIB_ABIS="lp64d lp64 ilp32d ilp32" DEFAULT_ABI="lp64d" ABI="lp64d" -# Library directories -LIBDIR_lp64d="lib64/lp64d" -LIBDIR_lp64="lib64/lp64" -SYMLINK_LIB="no" - -# Flags for lp64d -CFLAGS_lp64d="-mabi=lp64d" -LDFLAGS_lp64d="-m elf64lriscv" -CHOST_lp64d="riscv64-unknown-linux-gnu" - -# Flags for lp64 -CFLAGS_lp64="-mabi=lp64" -LDFLAGS_lp64="-m elf64lriscv_lp64" -CHOST_lp64="riscv64-unknown-linux-gnu" - # Enable lp64d by default ABI_RISCV="lp64d" diff --git a/profiles/arch/riscv/rv64gc/package.mask b/profiles/arch/riscv/rv64gc/package.mask deleted file mode 100644 index 43580b7b49a0..000000000000 --- a/profiles/arch/riscv/rv64gc/package.mask +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright 2019 Gentoo Authors -# Distributed under the terms of the GNU General Public License v2 - -# Doesnt work properly with the two-level libdirs -<dev-lang/python-3.7 diff --git a/profiles/arch/riscv/rv64gc/use.force b/profiles/arch/riscv/rv64gc/use.force index 7ce55a8948e1..eb2add7ba6b7 100644 --- a/profiles/arch/riscv/rv64gc/use.force +++ b/profiles/arch/riscv/rv64gc/use.force @@ -3,7 +3,3 @@ # Force the flag corresponding to the default ABI. abi_riscv_lp64d - -# Right now we have only one Python available, so we must use it -python_targets_python3_7 -python_single_target_python3_7 diff --git a/profiles/arch/riscv/rv64gc/use.mask b/profiles/arch/riscv/rv64gc/use.mask index 6e01a574cebb..b38fe8be382f 100644 --- a/profiles/arch/riscv/rv64gc/use.mask +++ b/profiles/arch/riscv/rv64gc/use.mask @@ -4,9 +4,5 @@ # Unmask the multilib flags for this arch. -abi_riscv_lp64d -abi_riscv_lp64 - -# Our Python has a lot of trouble with the two-level libdir. -python_targets_python2_7 -python_targets_python3_6 -python_single_target_python2_7 -python_single_target_python3_6 +-abi_riscv_ilp32d +-abi_riscv_ilp32 |