diff options
| author | V3n3RiX <venerix@redcorelinux.org> | 2021-03-03 10:28:17 +0000 |
|---|---|---|
| committer | V3n3RiX <venerix@redcorelinux.org> | 2021-03-03 10:28:17 +0000 |
| commit | d99093fb4bb5652015c06274d64083daa2439e4f (patch) | |
| tree | cf61513204d97974179580065e85df5c8009087c /metadata/md5-cache/sci-electronics/iverilog-10.3 | |
| parent | 463397cf1e064185110fe57c568d73f99a06f5d1 (diff) | |
gentoo resync : 03.03.2021
Diffstat (limited to 'metadata/md5-cache/sci-electronics/iverilog-10.3')
| -rw-r--r-- | metadata/md5-cache/sci-electronics/iverilog-10.3 | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/metadata/md5-cache/sci-electronics/iverilog-10.3 b/metadata/md5-cache/sci-electronics/iverilog-10.3 new file mode 100644 index 000000000000..94c3a63a00cd --- /dev/null +++ b/metadata/md5-cache/sci-electronics/iverilog-10.3 @@ -0,0 +1,14 @@ +BDEPEND=>=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.2-r1:1.16 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4 +DEFINED_PHASES=install prepare +DEPEND=dev-util/gperf sys-devel/bison sys-devel/flex sys-libs/readline:0 sys-libs/zlib +DESCRIPTION=A Verilog simulation and synthesis tool +EAPI=7 +HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog +IUSE=examples +KEYWORDS=~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ppc ~ppc64 ~riscv ~s390 sparc x86 +LICENSE=LGPL-2.1 +RDEPEND=sys-libs/readline:0 sys-libs/zlib +SLOT=0 +SRC_URI=https://github.com/steveicarus/iverilog/archive/v10_3.tar.gz -> iverilog-10.3.tar.gz +_eclasses_=autotools 9988ecbe04129214297a7bbf3d253710 libtool f143db5a74ccd9ca28c1234deffede96 multilib d410501a125f99ffb560b0c523cd3d1e toolchain-funcs 24921b57d6561d87cbef4916a296ada4 +_md5_=e0d0d3128769a8fc437c0841081f815c |