diff options
author | V3n3RiX <venerix@koprulu.sector> | 2022-03-20 00:40:44 +0000 |
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committer | V3n3RiX <venerix@koprulu.sector> | 2022-03-20 00:40:44 +0000 |
commit | 4cbcc855382a06088e2f016f62cafdbcb7e40665 (patch) | |
tree | 356496503d52354aa6d9f2d36126302fed5f3a73 /dev-libs/rocksdb/files/rocksdb-6.17.3-add_timer_for_riscv.patch | |
parent | fcc5224904648a8e6eb528d7603154160a20022f (diff) |
gentoo resync : 20.03.2022
Diffstat (limited to 'dev-libs/rocksdb/files/rocksdb-6.17.3-add_timer_for_riscv.patch')
-rw-r--r-- | dev-libs/rocksdb/files/rocksdb-6.17.3-add_timer_for_riscv.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/dev-libs/rocksdb/files/rocksdb-6.17.3-add_timer_for_riscv.patch b/dev-libs/rocksdb/files/rocksdb-6.17.3-add_timer_for_riscv.patch new file mode 100644 index 000000000000..b98cc9dc5fd6 --- /dev/null +++ b/dev-libs/rocksdb/files/rocksdb-6.17.3-add_timer_for_riscv.patch @@ -0,0 +1,40 @@ +Add timer for riscv. +Upstream PR status: https://github.com/facebook/rocksdb/pull/9215 +This PR hasn't been merged into the main branch. +https://bugs.gentoo.org/834855 + +--- a/utilities/transactions/lock/range/range_tree/lib/portability/toku_time.h ++++ b/utilities/transactions/lock/range/range_tree/lib/portability/toku_time.h +@@ -101,7 +101,7 @@ int toku_clock_gettime(clockid_t clk_id, struct timespec *ts) __attribute__((__v + typedef uint64_t tokutime_t; // Time type used in by tokutek timers. + + #if 0 +-// The value of tokutime_t is not specified here. ++// The value of tokutime_t is not specified here. + // It might be microseconds since 1/1/1970 (if gettimeofday() is + // used), or clock cycles since boot (if rdtsc is used). Or something + // else. +@@ -133,6 +133,23 @@ static inline tokutime_t toku_time_now(void) { + return result; + #elif defined(__powerpc__) + return __ppc_get_timebase(); ++#elif defined(__riscv) && __riscv_xlen == 32 ++ uint32_t cycles_lo, cycles_hi0, cycles_hi1; ++ // Implemented in assembly because Clang insisted on branching. ++ asm volatile( ++ "rdcycleh %0\n" ++ "rdcycle %1\n" ++ "rdcycleh %2\n" ++ "sub %0, %0, %2\n" ++ "seqz %0, %0\n" ++ "sub %0, zero, %0\n" ++ "and %1, %1, %0\n" ++ : "=r"(cycles_hi0), "=r"(cycles_lo), "=r"(cycles_hi1)); ++ return (static_cast<uint64_t>(cycles_hi1) << 32) | cycles_lo; ++#elif defined(__riscv) && __riscv_xlen == 64 ++ uint64_t cycles; ++ asm volatile("rdcycle %0" : "=r"(cycles)); ++ return cycles; + #else + #error No timer implementation for this platform + #endif |