diff options
author | V3n3RiX <venerix@koprulu.sector> | 2024-03-04 05:43:10 +0000 |
---|---|---|
committer | V3n3RiX <venerix@koprulu.sector> | 2024-03-04 05:43:10 +0000 |
commit | 57e2174dcd454b41778b7b437f88d0a9f1a6e428 (patch) | |
tree | e6f528c74cef8bdfdf1b07fbba3a70acbae6af25 /dev-libs/libgcrypt/files | |
parent | 0a648c5255c22a6092b8de20ffba9e235299a293 (diff) |
gentoo auto-resync : 04:03:2024 - 05:43:09
Diffstat (limited to 'dev-libs/libgcrypt/files')
6 files changed, 632 insertions, 228 deletions
diff --git a/dev-libs/libgcrypt/files/libgcrypt-1.10-build-Allow-build-with-Oz.patch b/dev-libs/libgcrypt/files/libgcrypt-1.10-build-Allow-build-with-Oz.patch deleted file mode 100644 index c54499e15dba..000000000000 --- a/dev-libs/libgcrypt/files/libgcrypt-1.10-build-Allow-build-with-Oz.patch +++ /dev/null @@ -1,50 +0,0 @@ -https://bugs.gentoo.org/902765 -https://dev.gnupg.org/T6432 -https://dev.gnupg.org/rC7edf1abb9a0d892a80cbf7ab42f64b2720671ee9 - -From 7edf1abb9a0d892a80cbf7ab42f64b2720671ee9 Mon Sep 17 00:00:00 2001 -From: NIIBE Yutaka <gniibe@fsij.org> -Date: Mon, 3 Apr 2023 14:00:15 +0900 -Subject: [PATCH] build: Allow build with -Oz. - -* cipher/Makefile.am [ENABLE_O_FLAG_MUNGING]: Support -Oz. -* random/Makefile.am [ENABLE_O_FLAG_MUNGING]: Support -Oz. - --- - -GnuPG-bug-id: 6432 -Signed-off-by: NIIBE Yutaka <gniibe@fsij.org> ---- - cipher/Makefile.am | 2 +- - random/Makefile.am | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/cipher/Makefile.am b/cipher/Makefile.am -index cf1fbe85..e67b1ee2 100644 ---- a/cipher/Makefile.am -+++ b/cipher/Makefile.am -@@ -165,7 +165,7 @@ gost-s-box$(EXEEXT_FOR_BUILD): gost-s-box.c - - - if ENABLE_O_FLAG_MUNGING --o_flag_munging = sed -e 's/-O\([2-9sg][2-9sg]*\)/-O1/' -e 's/-Ofast/-O1/g' -+o_flag_munging = sed -e 's/-O\([2-9sgz][2-9sgz]*\)/-O1/' -e 's/-Ofast/-O1/g' - else - o_flag_munging = cat - endif -diff --git a/random/Makefile.am b/random/Makefile.am -index af978570..0c935a05 100644 ---- a/random/Makefile.am -+++ b/random/Makefile.am -@@ -56,7 +56,7 @@ jitterentropy-base.c jitterentropy.h jitterentropy-base-user.h - - # The rndjent module needs to be compiled without optimization. */ - if ENABLE_O_FLAG_MUNGING --o_flag_munging = sed -e 's/-O\([1-9sg][1-9sg]*\)/-O0/g' -e 's/-Ofast/-O0/g' -+o_flag_munging = sed -e 's/-O\([1-9sgz][1-9sgz]*\)/-O0/g' -e 's/-Ofast/-O0/g' - else - o_flag_munging = cat - endif --- -2.40.0 - diff --git a/dev-libs/libgcrypt/files/libgcrypt-1.10.1-configure-clang16.patch b/dev-libs/libgcrypt/files/libgcrypt-1.10.1-configure-clang16.patch deleted file mode 100644 index fa80c999a3aa..000000000000 --- a/dev-libs/libgcrypt/files/libgcrypt-1.10.1-configure-clang16.patch +++ /dev/null @@ -1,134 +0,0 @@ -https://lists.gnupg.org/pipermail/gcrypt-devel/2022-December/005410.html - ---- a/configure.ac -+++ b/configure.ac -@@ -1211,7 +1211,8 @@ AC_CACHE_CHECK([whether GCC assembler is compatible for ARM assembly implementat - /* Test if '.type' and '.size' are supported. */ - ".size asmfunc,.-asmfunc;\n\t" - ".type asmfunc,%function;\n\t" -- );]], [ asmfunc(); ] )], -+ ); -+ void asmfunc(void);]], [ asmfunc(); ] )], - [gcry_cv_gcc_arm_platform_as_ok=yes]) - fi]) - if test "$gcry_cv_gcc_arm_platform_as_ok" = "yes" ; then -@@ -1238,7 +1239,8 @@ AC_CACHE_CHECK([whether GCC assembler is compatible for ARMv8/Aarch64 assembly i - "eor x0, x0, x30, ror #12;\n\t" - "add x0, x0, x30, asr #12;\n\t" - "eor v0.16b, v0.16b, v31.16b;\n\t" -- );]], [ asmfunc(); ] )], -+ ); -+ void asmfunc(void);]], [ asmfunc(); ] )], - [gcry_cv_gcc_aarch64_platform_as_ok=yes]) - fi]) - if test "$gcry_cv_gcc_aarch64_platform_as_ok" = "yes" ; then -@@ -1267,7 +1269,8 @@ AC_CACHE_CHECK([whether GCC assembler supports for CFI directives], - ".cfi_restore_state\n\t" - ".long 0\n\t" - ".cfi_endproc\n\t" -- );]])], -+ ); -+ void asmfunc(void)]])], - [gcry_cv_gcc_asm_cfi_directives=yes])]) - if test "$gcry_cv_gcc_asm_cfi_directives" = "yes" ; then - AC_DEFINE(HAVE_GCC_ASM_CFI_DIRECTIVES,1, -@@ -1666,7 +1669,8 @@ if test $amd64_as_feature_detection = yes; then - [gcry_cv_gcc_as_const_division_ok], - [gcry_cv_gcc_as_const_division_ok=no - AC_LINK_IFELSE([AC_LANG_PROGRAM( -- [[__asm__(".text\n\tfn:\n\t xorl \$(123456789/12345678), %ebp;\n\t");]], -+ [[__asm__(".text\n\tfn:\n\t xorl \$(123456789/12345678), %ebp;\n\t"); -+ void fn(void);]], - [fn();])], - [gcry_cv_gcc_as_const_division_ok=yes])]) - if test "$gcry_cv_gcc_as_const_division_ok" = "no" ; then -@@ -1679,7 +1683,8 @@ if test $amd64_as_feature_detection = yes; then - [gcry_cv_gcc_as_const_division_with_wadivide_ok], - [gcry_cv_gcc_as_const_division_with_wadivide_ok=no - AC_LINK_IFELSE([AC_LANG_PROGRAM( -- [[__asm__(".text\n\tfn:\n\t xorl \$(123456789/12345678), %ebp;\n\t");]], -+ [[__asm__(".text\n\tfn:\n\t xorl \$(123456789/12345678), %ebp;\n\t"); -+ void fn(void);]], - [fn();])], - [gcry_cv_gcc_as_const_division_with_wadivide_ok=yes])]) - if test "$gcry_cv_gcc_as_const_division_with_wadivide_ok" = "no" ; then -@@ -1715,7 +1720,8 @@ if test $amd64_as_feature_detection = yes; then - * and "-Wa,--divide" workaround failed, this causes assembly - * to be disable on this machine. */ - "xorl \$(123456789/12345678), %ebp;\n\t" -- );]], [ asmfunc(); ])], -+ ); -+ void asmfunc(void);]], [ asmfunc(); ])], - [gcry_cv_gcc_amd64_platform_as_ok=yes]) - fi]) - if test "$gcry_cv_gcc_amd64_platform_as_ok" = "yes" ; then -@@ -1734,7 +1740,8 @@ if test $amd64_as_feature_detection = yes; then - ".globl asmfunc\n\t" - "asmfunc:\n\t" - "xorq \$(1234), %rbp;\n\t" -- );]], [ asmfunc(); ])], -+ ); -+ void asmfunc(void);]], [ asmfunc(); ])], - [gcry_cv_gcc_win64_platform_as_ok=yes])]) - if test "$gcry_cv_gcc_win64_platform_as_ok" = "yes" ; then - AC_DEFINE(HAVE_COMPATIBLE_GCC_WIN64_PLATFORM_AS,1, -@@ -1767,7 +1774,8 @@ AC_CACHE_CHECK([whether GCC assembler is compatible for Intel syntax assembly im - "sub eax, [esp + 4];\n\t" - "add dword ptr [esp + eax], 0b10101;\n\t" - ".att_syntax prefix\n\t" -- );]], [ actest(); ])], -+ ); -+ void actest(void);]], [ actest(); ])], - [gcry_cv_gcc_platform_as_ok_for_intel_syntax=yes]) - fi]) - if test "$gcry_cv_gcc_platform_as_ok_for_intel_syntax" = "yes" ; then -@@ -1832,6 +1840,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports NEON instructions], - "vadd.u64 %q0, %q1;\n\t" - "vadd.s64 %d3, %d2, %d3;\n\t" - ); -+ void testfn(void); - ]], [ testfn(); ])], - [gcry_cv_gcc_inline_asm_neon=yes]) - fi]) -@@ -1879,6 +1888,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports AArch32 Crypto Extension i - - "vmull.p64 q0, d0, d0;\n\t" - ); -+ void testfn(void); - ]], [ testfn(); ])], - [gcry_cv_gcc_inline_asm_aarch32_crypto=yes]) - fi]) -@@ -1907,6 +1917,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports AArch64 NEON instructions] - "dup v0.8b, w0;\n\t" - "ld4 {v0.8b,v1.8b,v2.8b,v3.8b},[x0],\#32;\n\t" - ); -+ void testfn(void); - ]], [ testfn(); ])], - [gcry_cv_gcc_inline_asm_aarch64_neon=yes]) - fi]) -@@ -1955,6 +1966,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports AArch64 Crypto Extension i - "pmull v0.1q, v0.1d, v31.1d;\n\t" - "pmull2 v0.1q, v0.2d, v31.2d;\n\t" - ); -+ void testfn(void); - ]], [ testfn(); ])], - [gcry_cv_gcc_inline_asm_aarch64_crypto=yes]) - fi]) -@@ -2050,6 +2062,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports PowerPC AltiVec/VSX/crypto - "vshasigmad %v0, %v1, 0, 15;\n" - "vpmsumd %v11, %v11, %v11;\n" - ); -+ void testfn(void); - ]], [ testfn(); ] )], - [gcry_cv_gcc_inline_asm_ppc_altivec=yes]) - fi]) -@@ -2075,6 +2088,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports PowerISA 3.00 instructions - "testfn:\n" - "stxvb16x %r1,%v12,%v30;\n" - ); -+ void testfn(void); - ]], [ testfn(); ])], - [gcry_cv_gcc_inline_asm_ppc_arch_3_00=yes]) - fi]) - - diff --git a/dev-libs/libgcrypt/files/libgcrypt-1.10.3-hppa.patch b/dev-libs/libgcrypt/files/libgcrypt-1.10.3-hppa.patch new file mode 100644 index 000000000000..daa1bba9f439 --- /dev/null +++ b/dev-libs/libgcrypt/files/libgcrypt-1.10.3-hppa.patch @@ -0,0 +1,110 @@ +https://bugs.gentoo.org/925284 +https://git.gnupg.org/cgi-bin/gitweb.cgi?p=libgcrypt.git;a=commit;h=75e9bcccb69a9dea67d90840bd295bbd1749cea3 + +From 75e9bcccb69a9dea67d90840bd295bbd1749cea3 Mon Sep 17 00:00:00 2001 +From: NIIBE Yutaka <gniibe@fsij.org> +Date: Mon, 4 Mar 2024 09:00:59 +0900 +Subject: [PATCH] mpi: Fix ECC computation on hppa. + +* mpi/ec-inline.h [__hppa] (ADD4_LIMB32, SUB4_LIMB32): New. +* mpi/longlong.h [__hppa] (add_ssaaaa, sub_ddmmss): Add __CLOBBER_CC. + +-- + +Cherry-pick master commit of: + b757f4130af987bdfc769b754b6e9e27882c349c + +GnuPG-bug-id: 7022 +Signed-off-by: NIIBE Yutaka <gniibe@fsij.org> +--- + mpi/ec-inline.h | 40 ++++++++++++++++++++++++++++++++++++++++ + mpi/longlong.h | 12 ++++++------ + 2 files changed, 46 insertions(+), 6 deletions(-) + +diff --git a/mpi/ec-inline.h b/mpi/ec-inline.h +index 0ffdf8eb..c24d5352 100644 +--- a/mpi/ec-inline.h ++++ b/mpi/ec-inline.h +@@ -921,6 +921,46 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + + #endif /* HAVE_COMPATIBLE_GCC_ARM_PLATFORM_AS */ + ++#if defined (__hppa) && __GNUC__ >= 4 ++#define ADD4_LIMB32(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) \ ++ __asm__ ("add %7,%11,%3\n\t" \ ++ "addc %6,%10,%2\n\t" \ ++ "addc %5,%9,%1\n\t" \ ++ "addc %4,%8,%0" \ ++ : "=r" (A3), \ ++ "=&r" (A2), \ ++ "=&r" (A1), \ ++ "=&r" (A0) \ ++ : "rM" ((mpi_limb_t)(B3)), \ ++ "rM" ((mpi_limb_t)(B2)), \ ++ "rM" ((mpi_limb_t)(B1)), \ ++ "rM" ((mpi_limb_t)(B0)), \ ++ "rM" ((mpi_limb_t)(C3)), \ ++ "rM" ((mpi_limb_t)(C2)), \ ++ "rM" ((mpi_limb_t)(C1)), \ ++ "rM" ((mpi_limb_t)(C0)) \ ++ : "cc") ++ ++#define SUB4_LIMB32(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) \ ++ __asm__ ("sub %7,%11,%3\n\t" \ ++ "subb %6,%10,%2\n\t" \ ++ "subb %5,%9,%1\n\t" \ ++ "subb %4,%8,%0\n\t" \ ++ : "=r" (A3), \ ++ "=&r" (A2), \ ++ "=&r" (A1), \ ++ "=&r" (A0) \ ++ : "rM" ((mpi_limb_t)(B3)), \ ++ "rM" ((mpi_limb_t)(B2)), \ ++ "rM" ((mpi_limb_t)(B1)), \ ++ "rM" ((mpi_limb_t)(B0)), \ ++ "rM" ((mpi_limb_t)(C3)), \ ++ "rM" ((mpi_limb_t)(C2)), \ ++ "rM" ((mpi_limb_t)(C1)), \ ++ "rM" ((mpi_limb_t)(C0)) \ ++ : "cc") ++ ++#endif /* __hppa */ + + /* Common 32-bit arch addition/subtraction macros. */ + +diff --git a/mpi/longlong.h b/mpi/longlong.h +index c299534c..1ab70e7e 100644 +--- a/mpi/longlong.h ++++ b/mpi/longlong.h +@@ -394,23 +394,23 @@ extern UDItype __udiv_qrnnd (); + ***************************************/ + #if defined (__hppa) && W_TYPE_SIZE == 32 + # define add_ssaaaa(sh, sl, ah, al, bh, bl) \ +- __asm__ (" add %4,%5,%1\n" \ +- " addc %2,%3,%0" \ ++ __asm__ ("add %4,%5,%1\n\t" \ ++ "addc %2,%3,%0" \ + : "=r" ((USItype)(sh)), \ + "=&r" ((USItype)(sl)) \ + : "%rM" ((USItype)(ah)), \ + "rM" ((USItype)(bh)), \ + "%rM" ((USItype)(al)), \ +- "rM" ((USItype)(bl))) ++ "rM" ((USItype)(bl)) __CLOBBER_CC) + # define sub_ddmmss(sh, sl, ah, al, bh, bl) \ +- __asm__ (" sub %4,%5,%1\n" \ +- " subb %2,%3,%0" \ ++ __asm__ ("sub %4,%5,%1\n\t" \ ++ "subb %2,%3,%0" \ + : "=r" ((USItype)(sh)), \ + "=&r" ((USItype)(sl)) \ + : "rM" ((USItype)(ah)), \ + "rM" ((USItype)(bh)), \ + "rM" ((USItype)(al)), \ +- "rM" ((USItype)(bl))) ++ "rM" ((USItype)(bl)) __CLOBBER_CC) + # if defined (_PA_RISC1_1) + # define umul_ppmm(wh, wl, u, v) \ + do { \ +-- +2.30.2 diff --git a/dev-libs/libgcrypt/files/libgcrypt-1.10.3-x86-refactor.patch b/dev-libs/libgcrypt/files/libgcrypt-1.10.3-x86-refactor.patch new file mode 100644 index 000000000000..527150671097 --- /dev/null +++ b/dev-libs/libgcrypt/files/libgcrypt-1.10.3-x86-refactor.patch @@ -0,0 +1,428 @@ +https://bugs.gentoo.org/915060 +https://git.gnupg.org/cgi-bin/gitweb.cgi?p=libgcrypt.git;a=commit;h=07f0563d325c6589ca1560525d3b22291feec227 + +From 07f0563d325c6589ca1560525d3b22291feec227 Mon Sep 17 00:00:00 2001 +From: Jussi Kivilinna <jussi.kivilinna@iki.fi> +Date: Tue, 19 Dec 2023 20:23:47 +0200 +Subject: [PATCH] mpi/ec-inline: refactor i386 assembly to reduce register + usage + +* mpi/ec-inline.h [__i386__] (ADD2_LIMB32_CARRY_OUT) +(ADD2_LIMB32_CARRY_IN_OUT, ADD2_LIB32_CARRY_IN, SUB2_LIMB32_CARRY_OUT) +(SUB2_LIMB32_CARRY_IN_OUT, SUB2_LIB32_CARRY_IN, ADD8_LIMB32) +(ADD10_LIMB32, ADD14_LIMB32, SUB8_LIMB32, SUB10_LIMB32) +(SUB14_LIMB32): New. +[__i386__] (ADD4_LIMB32, ADD6_LIMB32, SUB4_LIMB32, SUB6_LIMB32): Rewrite +to use new *_CARRY_* macros. +[BYTES_PER_MPI_LIMB == 4] (ADD4_LIMB64): Use ADD8_LIMB32 if available. +[BYTES_PER_MPI_LIMB == 4] (ADD5_LIMB64): Use ADD10_LIMB32 if available. +[BYTES_PER_MPI_LIMB == 4] (ADD7_LIMB64): Use ADD14_LIMB32 if available. +[BYTES_PER_MPI_LIMB == 4] (SUB4_LIMB64): Use SUB8_LIMB32 if available. +[BYTES_PER_MPI_LIMB == 4] (SUB5_LIMB64): Use SUB10_LIMB32 if available. +[BYTES_PER_MPI_LIMB == 4] (SUB7_LIMB64): Use SUB14_LIMB32 if available. +-- + +Cherry pick of master commit: + 956f1ed4ec6ead59dc56f574f943f1fe25dac723 + +This commit reduces number register operands and register pressure +at i386 assembly used in `ec-nist.c` NIST-P192, P224, P256, and P384. +Performance stays relatively same, with P192 being ~2% slower +than before and P384 being ~5% faster. + +GnuPG-bug-id: T6892 +Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> +--- + mpi/ec-inline.h | 327 +++++++++++++++++++++++++++++++++--------------- + 1 file changed, 229 insertions(+), 98 deletions(-) + +diff --git a/mpi/ec-inline.h b/mpi/ec-inline.h +index a07826e3..0ffdf8eb 100644 +--- a/mpi/ec-inline.h ++++ b/mpi/ec-inline.h +@@ -641,116 +641,192 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + /* i386 addition/subtraction helpers. */ + #if defined (__i386__) && defined(HAVE_CPU_ARCH_X86) && __GNUC__ >= 4 + +-#define ADD4_LIMB32(a3, a2, a1, a0, b3, b2, b1, b0, c3, c2, c1, c0) \ +- __asm__ ("addl %11, %3\n" \ +- "adcl %10, %2\n" \ +- "adcl %9, %1\n" \ +- "adcl %8, %0\n" \ +- : "=r" (a3), \ +- "=&r" (a2), \ ++#define ADD2_LIMB32_CARRY_OUT(carry, a1, a0, b1, b0, c1, c0) \ ++ __asm__ ("addl %7, %2\n" \ ++ "adcl %6, %1\n" \ ++ "sbbl %0, %0\n" \ ++ : "=r" (carry), \ + "=&r" (a1), \ + "=&r" (a0) \ +- : "0" ((mpi_limb_t)(b3)), \ +- "1" ((mpi_limb_t)(b2)), \ +- "2" ((mpi_limb_t)(b1)), \ +- "3" ((mpi_limb_t)(b0)), \ +- "g" ((mpi_limb_t)(c3)), \ +- "g" ((mpi_limb_t)(c2)), \ +- "g" ((mpi_limb_t)(c1)), \ +- "g" ((mpi_limb_t)(c0)) \ ++ : "0" ((mpi_limb_t)(0)), \ ++ "1" ((mpi_limb_t)(b1)), \ ++ "2" ((mpi_limb_t)(b0)), \ ++ "re" ((mpi_limb_t)(c1)), \ ++ "re" ((mpi_limb_t)(c0)) \ + : "cc") + ++#define ADD2_LIMB32_CARRY_IN_OUT(a1, a0, b1, b0, c1, c0, carry) \ ++ __asm__ ("addl $1, %0\n" \ ++ "adcl %7, %2\n" \ ++ "adcl %6, %1\n" \ ++ "sbbl %0, %0\n" \ ++ : "=r" (carry), \ ++ "=&r" (a1), \ ++ "=&r" (a0) \ ++ : "0" ((mpi_limb_t)(carry)), \ ++ "1" ((mpi_limb_t)(b1)), \ ++ "2" ((mpi_limb_t)(b0)), \ ++ "re" ((mpi_limb_t)(c1)), \ ++ "re" ((mpi_limb_t)(c0)) \ ++ : "cc") ++ ++#define ADD2_LIMB32_CARRY_IN(a1, a0, b1, b0, c1, c0, carry) \ ++ __asm__ ("addl $1, %2\n" \ ++ "adcl %7, %1\n" \ ++ "adcl %6, %0\n" \ ++ : "=r" (a1), \ ++ "=&r" (a0), \ ++ "=&g" (carry) \ ++ : "0" ((mpi_limb_t)(b1)), \ ++ "1" ((mpi_limb_t)(b0)), \ ++ "2" ((mpi_limb_t)(carry)), \ ++ "re" ((mpi_limb_t)(c1)), \ ++ "re" ((mpi_limb_t)(c0)) \ ++ : "cc") ++ ++#define ADD4_LIMB32(a3, a2, a1, a0, b3, b2, b1, b0, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry4_32; \ ++ ADD2_LIMB32_CARRY_OUT(__carry4_32, a1, a0, b1, b0, c1, c0); \ ++ ADD2_LIMB32_CARRY_IN(a3, a2, b3, b2, c3, c2, __carry4_32); \ ++ } while (0) ++ + #define ADD6_LIMB32(a5, a4, a3, a2, a1, a0, b5, b4, b3, b2, b1, b0, \ + c5, c4, c3, c2, c1, c0) do { \ + mpi_limb_t __carry6_32; \ +- __asm__ ("addl %10, %3\n" \ +- "adcl %9, %2\n" \ +- "adcl %8, %1\n" \ +- "sbbl %0, %0\n" \ +- : "=r" (__carry6_32), \ +- "=&r" (a2), \ +- "=&r" (a1), \ +- "=&r" (a0) \ +- : "0" ((mpi_limb_t)(0)), \ +- "1" ((mpi_limb_t)(b2)), \ +- "2" ((mpi_limb_t)(b1)), \ +- "3" ((mpi_limb_t)(b0)), \ +- "g" ((mpi_limb_t)(c2)), \ +- "g" ((mpi_limb_t)(c1)), \ +- "g" ((mpi_limb_t)(c0)) \ +- : "cc"); \ +- __asm__ ("addl $1, %3\n" \ +- "adcl %10, %2\n" \ +- "adcl %9, %1\n" \ +- "adcl %8, %0\n" \ +- : "=r" (a5), \ +- "=&r" (a4), \ +- "=&r" (a3), \ +- "=&r" (__carry6_32) \ +- : "0" ((mpi_limb_t)(b5)), \ +- "1" ((mpi_limb_t)(b4)), \ +- "2" ((mpi_limb_t)(b3)), \ +- "3" ((mpi_limb_t)(__carry6_32)), \ +- "g" ((mpi_limb_t)(c5)), \ +- "g" ((mpi_limb_t)(c4)), \ +- "g" ((mpi_limb_t)(c3)) \ +- : "cc"); \ ++ ADD2_LIMB32_CARRY_OUT(__carry6_32, a1, a0, b1, b0, c1, c0); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry6_32); \ ++ ADD2_LIMB32_CARRY_IN(a5, a4, b5, b4, c5, c4, __carry6_32); \ ++ } while (0) ++ ++#define ADD8_LIMB32(a7, a6, a5, a4, a3, a2, a1, a0, \ ++ b7, b6, b5, b4, b3, b2, b1, b0, \ ++ c7, c6, c5, c4, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry8_32; \ ++ ADD2_LIMB32_CARRY_OUT(__carry8_32, a1, a0, b1, b0, c1, c0); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry8_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a5, a4, b5, b4, c5, c4, __carry8_32); \ ++ ADD2_LIMB32_CARRY_IN(a7, a6, b7, b6, c7, c6, __carry8_32); \ + } while (0) + +-#define SUB4_LIMB32(a3, a2, a1, a0, b3, b2, b1, b0, c3, c2, c1, c0) \ +- __asm__ ("subl %11, %3\n" \ +- "sbbl %10, %2\n" \ +- "sbbl %9, %1\n" \ +- "sbbl %8, %0\n" \ +- : "=r" (a3), \ +- "=&r" (a2), \ ++#define ADD10_LIMB32(a9, a8, a7, a6, a5, a4, a3, a2, a1, a0, \ ++ b9, b8, b7, b6, b5, b4, b3, b2, b1, b0, \ ++ c9, c8, c7, c6, c5, c4, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry10_32; \ ++ ADD2_LIMB32_CARRY_OUT(__carry10_32, a1, a0, b1, b0, c1, c0); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry10_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a5, a4, b5, b4, c5, c4, __carry10_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a7, a6, b7, b6, c7, c6, __carry10_32); \ ++ ADD2_LIMB32_CARRY_IN(a9, a8, b9, b8, c9, c8, __carry10_32); \ ++ } while (0) ++ ++#define ADD14_LIMB32(a13, a12, a11, a10, a9, a8, a7, \ ++ a6, a5, a4, a3, a2, a1, a0, \ ++ b13, b12, b11, b10, b9, b8, b7, \ ++ b6, b5, b4, b3, b2, b1, b0, \ ++ c13, c12, c11, c10, c9, c8, c7, \ ++ c6, c5, c4, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry14_32; \ ++ ADD2_LIMB32_CARRY_OUT(__carry14_32, a1, a0, b1, b0, c1, c0); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry14_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a5, a4, b5, b4, c5, c4, __carry14_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a7, a6, b7, b6, c7, c6, __carry14_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a9, a8, b9, b8, c9, c8, __carry14_32); \ ++ ADD2_LIMB32_CARRY_IN_OUT(a11, a10, b11, b10, c11, c10, __carry14_32); \ ++ ADD2_LIMB32_CARRY_IN(a13, a12, b13, b12, c13, c12, __carry14_32); \ ++ } while (0) ++ ++#define SUB2_LIMB32_CARRY_OUT(carry, a1, a0, b1, b0, c1, c0) \ ++ __asm__ ("subl %7, %2\n" \ ++ "sbbl %6, %1\n" \ ++ "sbbl %0, %0\n" \ ++ : "=r" (carry), \ + "=&r" (a1), \ + "=&r" (a0) \ +- : "0" ((mpi_limb_t)(b3)), \ +- "1" ((mpi_limb_t)(b2)), \ +- "2" ((mpi_limb_t)(b1)), \ +- "3" ((mpi_limb_t)(b0)), \ +- "g" ((mpi_limb_t)(c3)), \ +- "g" ((mpi_limb_t)(c2)), \ +- "g" ((mpi_limb_t)(c1)), \ +- "g" ((mpi_limb_t)(c0)) \ ++ : "0" ((mpi_limb_t)(0)), \ ++ "1" ((mpi_limb_t)(b1)), \ ++ "2" ((mpi_limb_t)(b0)), \ ++ "re" ((mpi_limb_t)(c1)), \ ++ "re" ((mpi_limb_t)(c0)) \ ++ : "cc") ++ ++#define SUB2_LIMB32_CARRY_IN_OUT(a1, a0, b1, b0, c1, c0, carry) \ ++ __asm__ ("addl $1, %0\n" \ ++ "sbbl %7, %2\n" \ ++ "sbbl %6, %1\n" \ ++ "sbbl %0, %0\n" \ ++ : "=r" (carry), \ ++ "=&r" (a1), \ ++ "=&r" (a0) \ ++ : "0" ((mpi_limb_t)(carry)), \ ++ "1" ((mpi_limb_t)(b1)), \ ++ "2" ((mpi_limb_t)(b0)), \ ++ "re" ((mpi_limb_t)(c1)), \ ++ "re" ((mpi_limb_t)(c0)) \ ++ : "cc") ++ ++#define SUB2_LIMB32_CARRY_IN(a1, a0, b1, b0, c1, c0, carry) \ ++ __asm__ ("addl $1, %2\n" \ ++ "sbbl %7, %1\n" \ ++ "sbbl %6, %0\n" \ ++ : "=r" (a1), \ ++ "=&r" (a0), \ ++ "=&g" (carry) \ ++ : "0" ((mpi_limb_t)(b1)), \ ++ "1" ((mpi_limb_t)(b0)), \ ++ "2" ((mpi_limb_t)(carry)), \ ++ "re" ((mpi_limb_t)(c1)), \ ++ "re" ((mpi_limb_t)(c0)) \ + : "cc") + ++#define SUB4_LIMB32(a3, a2, a1, a0, b3, b2, b1, b0, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry4_32; \ ++ SUB2_LIMB32_CARRY_OUT(__carry4_32, a1, a0, b1, b0, c1, c0); \ ++ SUB2_LIMB32_CARRY_IN(a3, a2, b3, b2, c3, c2, __carry4_32); \ ++ } while (0) ++ + #define SUB6_LIMB32(a5, a4, a3, a2, a1, a0, b5, b4, b3, b2, b1, b0, \ + c5, c4, c3, c2, c1, c0) do { \ +- mpi_limb_t __borrow6_32; \ +- __asm__ ("subl %10, %3\n" \ +- "sbbl %9, %2\n" \ +- "sbbl %8, %1\n" \ +- "sbbl %0, %0\n" \ +- : "=r" (__borrow6_32), \ +- "=&r" (a2), \ +- "=&r" (a1), \ +- "=&r" (a0) \ +- : "0" ((mpi_limb_t)(0)), \ +- "1" ((mpi_limb_t)(b2)), \ +- "2" ((mpi_limb_t)(b1)), \ +- "3" ((mpi_limb_t)(b0)), \ +- "g" ((mpi_limb_t)(c2)), \ +- "g" ((mpi_limb_t)(c1)), \ +- "g" ((mpi_limb_t)(c0)) \ +- : "cc"); \ +- __asm__ ("addl $1, %3\n" \ +- "sbbl %10, %2\n" \ +- "sbbl %9, %1\n" \ +- "sbbl %8, %0\n" \ +- : "=r" (a5), \ +- "=&r" (a4), \ +- "=&r" (a3), \ +- "=&r" (__borrow6_32) \ +- : "0" ((mpi_limb_t)(b5)), \ +- "1" ((mpi_limb_t)(b4)), \ +- "2" ((mpi_limb_t)(b3)), \ +- "3" ((mpi_limb_t)(__borrow6_32)), \ +- "g" ((mpi_limb_t)(c5)), \ +- "g" ((mpi_limb_t)(c4)), \ +- "g" ((mpi_limb_t)(c3)) \ +- : "cc"); \ ++ mpi_limb_t __carry6_32; \ ++ SUB2_LIMB32_CARRY_OUT(__carry6_32, a1, a0, b1, b0, c1, c0); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry6_32); \ ++ SUB2_LIMB32_CARRY_IN(a5, a4, b5, b4, c5, c4, __carry6_32); \ ++ } while (0) ++ ++#define SUB8_LIMB32(a7, a6, a5, a4, a3, a2, a1, a0, \ ++ b7, b6, b5, b4, b3, b2, b1, b0, \ ++ c7, c6, c5, c4, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry8_32; \ ++ SUB2_LIMB32_CARRY_OUT(__carry8_32, a1, a0, b1, b0, c1, c0); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry8_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a5, a4, b5, b4, c5, c4, __carry8_32); \ ++ SUB2_LIMB32_CARRY_IN(a7, a6, b7, b6, c7, c6, __carry8_32); \ ++ } while (0) ++ ++#define SUB10_LIMB32(a9, a8, a7, a6, a5, a4, a3, a2, a1, a0, \ ++ b9, b8, b7, b6, b5, b4, b3, b2, b1, b0, \ ++ c9, c8, c7, c6, c5, c4, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry10_32; \ ++ SUB2_LIMB32_CARRY_OUT(__carry10_32, a1, a0, b1, b0, c1, c0); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry10_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a5, a4, b5, b4, c5, c4, __carry10_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a7, a6, b7, b6, c7, c6, __carry10_32); \ ++ SUB2_LIMB32_CARRY_IN(a9, a8, b9, b8, c9, c8, __carry10_32); \ ++ } while (0) ++ ++#define SUB14_LIMB32(a13, a12, a11, a10, a9, a8, a7, \ ++ a6, a5, a4, a3, a2, a1, a0, \ ++ b13, b12, b11, b10, b9, b8, b7, \ ++ b6, b5, b4, b3, b2, b1, b0, \ ++ c13, c12, c11, c10, c9, c8, c7, \ ++ c6, c5, c4, c3, c2, c1, c0) do { \ ++ mpi_limb_t __carry14_32; \ ++ SUB2_LIMB32_CARRY_OUT(__carry14_32, a1, a0, b1, b0, c1, c0); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a3, a2, b3, b2, c3, c2, __carry14_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a5, a4, b5, b4, c5, c4, __carry14_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a7, a6, b7, b6, c7, c6, __carry14_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a9, a8, b9, b8, c9, c8, __carry14_32); \ ++ SUB2_LIMB32_CARRY_IN_OUT(a11, a10, b11, b10, c11, c10, __carry14_32); \ ++ SUB2_LIMB32_CARRY_IN(a13, a12, b13, b12, c13, c12, __carry14_32); \ + } while (0) + + #endif /* __i386__ */ +@@ -820,7 +896,6 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + "Ir" ((mpi_limb_t)(C0)) \ + : "cc") + +- + #define SUB6_LIMB32(A5, A4, A3, A2, A1, A0, B5, B4, B3, B2, B1, B0, \ + C5, C4, C3, C2, C1, C0) do { \ + mpi_limb_t __borrow6_32; \ +@@ -875,7 +950,13 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + C2.hi, C2.lo, C1.hi, C1.lo, C0.hi, C0.lo) + #endif + +-#if defined(ADD6_LIMB32) ++#if defined(ADD8_LIMB32) ++/* A[0..3] = B[0..3] + C[0..3] */ ++#define ADD4_LIMB64(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) \ ++ ADD8_LIMB32(A3.hi, A3.lo, A2.hi, A2.lo, A1.hi, A1.lo, A0.hi, A0.lo, \ ++ B3.hi, B3.lo, B2.hi, B2.lo, B1.hi, B1.lo, B0.hi, B0.lo, \ ++ C3.hi, C3.lo, C2.hi, C2.lo, C1.hi, C1.lo, C0.hi, C0.lo) ++#elif defined(ADD6_LIMB32) + /* A[0..3] = B[0..3] + C[0..3] */ + #define ADD4_LIMB64(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) do { \ + mpi_limb_t __carry4; \ +@@ -888,6 +969,28 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + } while (0) + #endif + ++#if defined(ADD10_LIMB32) ++/* A[0..4] = B[0..4] + C[0..4] */ ++#define ADD5_LIMB64(A4, A3, A2, A1, A0, B4, B3, B2, B1, B0, \ ++ C4, C3, C2, C1, C0) \ ++ ADD10_LIMB32(A4.hi, A4.lo, A3.hi, A3.lo, A2.hi, A2.lo, A1.hi, A1.lo, \ ++ A0.hi, A0.lo, B4.hi, B4.lo, B3.hi, B3.lo, B2.hi, B2.lo, \ ++ B1.hi, B1.lo, B0.hi, B0.lo, C4.hi, C4.lo, C3.hi, C3.lo, \ ++ C2.hi, C2.lo, C1.hi, C1.lo, C0.hi, C0.lo) ++#endif ++ ++#if defined(ADD14_LIMB32) ++/* A[0..6] = B[0..6] + C[0..6] */ ++#define ADD7_LIMB64(A6, A5, A4, A3, A2, A1, A0, B6, B5, B4, B3, B2, B1, B0, \ ++ C6, C5, C4, C3, C2, C1, C0) \ ++ ADD14_LIMB32(A6.hi, A6.lo, A5.hi, A5.lo, A4.hi, A4.lo, A3.hi, A3.lo, \ ++ A2.hi, A2.lo, A1.hi, A1.lo, A0.hi, A0.lo, B6.hi, B6.lo, \ ++ B5.hi, B5.lo, B4.hi, B4.lo, B3.hi, B3.lo, B2.hi, B2.lo, \ ++ B1.hi, B1.lo, B0.hi, B0.lo, C6.hi, C6.lo, C5.hi, C5.lo, \ ++ C4.hi, C4.lo, C3.hi, C3.lo, C2.hi, C2.lo, C1.hi, C1.lo, \ ++ C0.hi, C0.lo) ++#endif ++ + #if defined(SUB4_LIMB32) + /* A[0..1] = B[0..1] - C[0..1] */ + #define SUB2_LIMB64(A1, A0, B1, B0, C1, C0) \ +@@ -914,7 +1017,13 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + C2.hi, C2.lo, C1.hi, C1.lo, C0.hi, C0.lo) + #endif + +-#if defined(SUB6_LIMB32) ++#if defined(SUB8_LIMB32) ++/* A[0..3] = B[0..3] - C[0..3] */ ++#define SUB4_LIMB64(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) \ ++ SUB8_LIMB32(A3.hi, A3.lo, A2.hi, A2.lo, A1.hi, A1.lo, A0.hi, A0.lo, \ ++ B3.hi, B3.lo, B2.hi, B2.lo, B1.hi, B1.lo, B0.hi, B0.lo, \ ++ C3.hi, C3.lo, C2.hi, C2.lo, C1.hi, C1.lo, C0.hi, C0.lo) ++#elif defined(SUB6_LIMB32) + /* A[0..3] = B[0..3] - C[0..3] */ + #define SUB4_LIMB64(A3, A2, A1, A0, B3, B2, B1, B0, C3, C2, C1, C0) do { \ + mpi_limb_t __borrow4; \ +@@ -927,6 +1036,28 @@ LIMB64_HILO(mpi_limb_t hi, mpi_limb_t lo) + } while (0) + #endif + ++#if defined(SUB10_LIMB32) ++/* A[0..4] = B[0..4] - C[0..4] */ ++#define SUB5_LIMB64(A4, A3, A2, A1, A0, B4, B3, B2, B1, B0, \ ++ C4, C3, C2, C1, C0) \ ++ SUB10_LIMB32(A4.hi, A4.lo, A3.hi, A3.lo, A2.hi, A2.lo, A1.hi, A1.lo, \ ++ A0.hi, A0.lo, B4.hi, B4.lo, B3.hi, B3.lo, B2.hi, B2.lo, \ ++ B1.hi, B1.lo, B0.hi, B0.lo, C4.hi, C4.lo, C3.hi, C3.lo, \ ++ C2.hi, C2.lo, C1.hi, C1.lo, C0.hi, C0.lo) ++#endif ++ ++#if defined(SUB14_LIMB32) ++/* A[0..6] = B[0..6] - C[0..6] */ ++#define SUB7_LIMB64(A6, A5, A4, A3, A2, A1, A0, B6, B5, B4, B3, B2, B1, B0, \ ++ C6, C5, C4, C3, C2, C1, C0) \ ++ SUB14_LIMB32(A6.hi, A6.lo, A5.hi, A5.lo, A4.hi, A4.lo, A3.hi, A3.lo, \ ++ A2.hi, A2.lo, A1.hi, A1.lo, A0.hi, A0.lo, B6.hi, B6.lo, \ ++ B5.hi, B5.lo, B4.hi, B4.lo, B3.hi, B3.lo, B2.hi, B2.lo, \ ++ B1.hi, B1.lo, B0.hi, B0.lo, C6.hi, C6.lo, C5.hi, C5.lo, \ ++ C4.hi, C4.lo, C3.hi, C3.lo, C2.hi, C2.lo, C1.hi, C1.lo, \ ++ C0.hi, C0.lo) ++#endif ++ + #endif /* BYTES_PER_MPI_LIMB == 4 */ + + +-- +2.30.2 diff --git a/dev-libs/libgcrypt/files/libgcrypt-1.10.3-x86.patch b/dev-libs/libgcrypt/files/libgcrypt-1.10.3-x86.patch new file mode 100644 index 000000000000..51ea0047c4e4 --- /dev/null +++ b/dev-libs/libgcrypt/files/libgcrypt-1.10.3-x86.patch @@ -0,0 +1,94 @@ +https://bugs.gentoo.org/915060 +https://git.gnupg.org/cgi-bin/gitweb.cgi?p=libgcrypt.git;a=commit;h=08b88b4012f7837736b8d29a3689ce3fff2a10c8 + +From 08b88b4012f7837736b8d29a3689ce3fff2a10c8 Mon Sep 17 00:00:00 2001 +From: Jussi Kivilinna <jussi.kivilinna@iki.fi> +Date: Sat, 16 Dec 2023 19:50:23 +0200 +Subject: [PATCH] mpi/ec-nist: fix for -Og build failure on i386 + +* mpi/ec-nist.c (_gcry_mpi_ec_nist256_mod) +(_gcry_mpi_ec_nist384_mod): Load p_mult constant with carry offset +to stack. +-- + +Cherry pick master commit of: + 90097bd2f41c217dc5c666570e5680f432cf92d3 + +Patch fixes compilation error on i386 with -Og optimization level. + +In file included from ../../mpi/ec-nist.c:34: +../../mpi/ec-nist.c: In function '_gcry_mpi_ec_nist256_mod': +../../mpi/ec-inline.h:701:3: error: 'asm' operand has impossible constraints + 701 | __asm__ ("subl %11, %3\n" \ + | ^~~~~~~ +../../mpi/ec-inline.h:894:9: note: in expansion of macro 'SUB4_LIMB32' + 894 | SUB4_LIMB32(A1.hi, A1.lo, A0.hi, A0.lo, \ + | ^~~~~~~~~~~ +../../mpi/ec-inline.h:1009:5: note: in expansion of macro 'SUB2_LIMB64' + 1009 | SUB2_LIMB64(A4, A3, B4, B3, C4, C3); \ + | ^~~~~~~~~~~ +../../mpi/ec-nist.c:474:3: note: in expansion of macro 'SUB5_LIMB64' + 474 | SUB5_LIMB64 (s[4], s[3], s[2], s[1], s[0], + | ^~~~~~~~~~~ + +Appears that in problematic function, too many registers end up being +allocated for addressing and there is not enough register left for +asm input/output (4 registers needed for this block). Problem can be +workaround by reducing needed addressing registers by pushing +`p_mult[carry + ...]` values to stack. On other compiler flag levels +and architectures, compiler should be able to optimize away this +extra copying and have not effect on performance. + +GnuPG-bug-id: T6892 +Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> +--- + mpi/ec-nist.c | 23 ++++++++++++++++------- + 1 file changed, 16 insertions(+), 7 deletions(-) + +diff --git a/mpi/ec-nist.c b/mpi/ec-nist.c +index f792405c..559d02d9 100644 +--- a/mpi/ec-nist.c ++++ b/mpi/ec-nist.c +@@ -471,11 +471,15 @@ _gcry_mpi_ec_nist256_mod (gcry_mpi_t w, mpi_ec_t ctx) + + carry = LO32_LIMB64(s[4]); + ++ /* Load values to stack to ease register pressure on i386. */ ++ e[0] = p_mult[carry + 4][0]; ++ e[1] = p_mult[carry + 4][1]; ++ e[2] = p_mult[carry + 4][2]; ++ e[3] = p_mult[carry + 4][3]; ++ e[4] = p_mult[carry + 4][4]; + SUB5_LIMB64 (s[4], s[3], s[2], s[1], s[0], + s[4], s[3], s[2], s[1], s[0], +- p_mult[carry + 4][4], p_mult[carry + 4][3], +- p_mult[carry + 4][2], p_mult[carry + 4][1], +- p_mult[carry + 4][0]); ++ e[4], e[3], e[2], e[1], e[0]); + + /* Add 1*P */ + ADD5_LIMB64 (d[4], d[3], d[2], d[1], d[0], +@@ -749,12 +753,17 @@ _gcry_mpi_ec_nist384_mod (gcry_mpi_t w, mpi_ec_t ctx) + + carry = LO32_LIMB64(s[6]); + ++ /* Load values to stack to ease register pressure on i386. */ ++ x[0] = p_mult[carry + 3][0]; ++ x[1] = p_mult[carry + 3][1]; ++ x[2] = p_mult[carry + 3][2]; ++ x[3] = p_mult[carry + 3][3]; ++ x[4] = p_mult[carry + 3][4]; ++ x[5] = p_mult[carry + 3][5]; ++ x[6] = p_mult[carry + 3][6]; + SUB7_LIMB64 (s[6], s[5], s[4], s[3], s[2], s[1], s[0], + s[6], s[5], s[4], s[3], s[2], s[1], s[0], +- p_mult[carry + 3][6], p_mult[carry + 3][5], +- p_mult[carry + 3][4], p_mult[carry + 3][3], +- p_mult[carry + 3][2], p_mult[carry + 3][1], +- p_mult[carry + 3][0]); ++ x[6], x[5], x[4], x[3], x[2], x[1], x[0]); + + ADD7_LIMB64 (d[6], d[5], d[4], d[3], d[2], d[1], d[0], + s[6], s[5], s[4], s[3], s[2], s[1], s[0], +-- +2.30.2 diff --git a/dev-libs/libgcrypt/files/libgcrypt-1.9.4-arm-neon-compile-fix.patch b/dev-libs/libgcrypt/files/libgcrypt-1.9.4-arm-neon-compile-fix.patch deleted file mode 100644 index a42b0e89008a..000000000000 --- a/dev-libs/libgcrypt/files/libgcrypt-1.9.4-arm-neon-compile-fix.patch +++ /dev/null @@ -1,44 +0,0 @@ -https://lists.gnupg.org/pipermail/gcrypt-devel/2022-January/005224.html - -From bc0b82ad8201a4d7bffa3cf0f5504b72c1011cb1 Mon Sep 17 00:00:00 2001 -From: Sam James <sam@gentoo.org> -Date: Tue, 18 Jan 2022 12:44:22 +0000 -Subject: [PATCH] cipher/cipher-gcm: fix build failure on ARM NEON - -'features' is only defined when relevant CPU features are found, but -one of the uses below its definition checked for GCM_USE_ARM_NEON which -wasn't in the guard above it. - -i.e. We used to only define 'features' when: -- GCM_USE_INTEL_PCLMUL -- GCM_USE_ARM_PMULL -- GCM_USE_S390X_CRYPTO -- GCM_USE_PPC_VPMSUM -- GCM_USE_S390X_CRYPTO -- GCM_USE_PPC_VPMSUM -is set. - -We were missing GCM_USE_ARM_NEON so when we check for GCM_USE_ARM_NEON -below, it'd fail as features wasn't defined. - -Bug: https://bugs.gentoo.org/831397 ---- - cipher/cipher-gcm.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/cipher/cipher-gcm.c b/cipher/cipher-gcm.c -index a039c5e9..22834f35 100644 ---- a/cipher/cipher-gcm.c -+++ b/cipher/cipher-gcm.c -@@ -583,7 +583,8 @@ static void - setupM (gcry_cipher_hd_t c) - { - #if defined(GCM_USE_INTEL_PCLMUL) || defined(GCM_USE_ARM_PMULL) || \ -- defined(GCM_USE_S390X_CRYPTO) || defined(GCM_USE_PPC_VPMSUM) -+ defined(GCM_USE_ARM_NEON) || defined(GCM_USE_S390X_CRYPTO) || \ -+ defined(GCM_USE_PPC_VPMSUM) - unsigned int features = _gcry_get_hw_features (); - #endif - --- -2.34.1 |