diff options
author | V3n3RiX <venerix@koprulu.sector> | 2022-08-22 14:43:09 +0100 |
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committer | V3n3RiX <venerix@koprulu.sector> | 2022-08-22 14:43:09 +0100 |
commit | c0a9f2400f704c438b0cef4f4105e7bb6c3cbbff (patch) | |
tree | f03dacf9fcbf88186d23a1c68620015cca2a06b2 /dev-lang/zig/files | |
parent | 4c4bbf21230bd972cf759b2a40b782aa4149fc1f (diff) |
gentoo auto-resync : 22:08:2022 - 14:43:09
Diffstat (limited to 'dev-lang/zig/files')
-rw-r--r-- | dev-lang/zig/files/zig-0.9.1-fix-riscv.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/dev-lang/zig/files/zig-0.9.1-fix-riscv.patch b/dev-lang/zig/files/zig-0.9.1-fix-riscv.patch new file mode 100644 index 000000000000..372a68ea02ad --- /dev/null +++ b/dev-lang/zig/files/zig-0.9.1-fix-riscv.patch @@ -0,0 +1,47 @@ +https://github.com/ziglang/zig/commit/ca3c4ff2d0afcdc8fe86e7e7b41a967c88779729 +From: Shupei Fan <dymarkfan@outlook.com> +zig0: properly set llvm_cpu_names and llvm_cpu_features for riscv + +Bug: https://bugs.gentoo.org/851732 + +--- a/src/stage1/zig0.cpp ++++ b/src/stage1/zig0.cpp +@@ -160,6 +160,17 @@ static void get_native_target(ZigTarget *target) { + } + } + ++static const char* get_baseline_llvm_cpu_name(ZigLLVM_ArchType arch) { ++ return ""; ++} ++ ++static const char* get_baseline_llvm_cpu_features(ZigLLVM_ArchType arch) { ++ switch (arch) { ++ case ZigLLVM_riscv64: return "+a,+c,+d,+m"; ++ default: return ""; ++ } ++} ++ + static Error target_parse_triple(struct ZigTarget *target, const char *zig_triple, const char *mcpu, + const char *dynamic_linker) + { +@@ -178,8 +189,8 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl + } else if (strcmp(mcpu, "baseline") == 0) { + target->is_native_os = false; + target->is_native_cpu = false; +- target->llvm_cpu_name = ""; +- target->llvm_cpu_features = ""; ++ target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch); ++ target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch); + } else { + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); +@@ -220,6 +231,9 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); + } ++ ++ target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch); ++ target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch); + } + + return ErrorNone; |