diff options
author | V3n3RiX <venerix@redcorelinux.org> | 2020-03-09 01:04:17 +0000 |
---|---|---|
committer | V3n3RiX <venerix@redcorelinux.org> | 2020-03-09 23:25:14 +0000 |
commit | f89ae15dd91a3d9a6a929b1ccdff06c50819054c (patch) | |
tree | 6ecdf4df16ef3f5b303940432cb6d04ebfac83a4 /sys-kernel/linux-image-redcore-lts-legacy | |
parent | 8d04dfa4cee0a17fc08d7f421c094de2b566c8e7 (diff) |
sys-kernel/linux-{image,sources}-redcore-lts-legacy : revision bump, revert https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/?id=52918ed5fcf05d97d257f4131e19479da18f5d16, breaks kvm_amd
Diffstat (limited to 'sys-kernel/linux-image-redcore-lts-legacy')
-rw-r--r-- | sys-kernel/linux-image-redcore-lts-legacy/files/4.19-revert_52918ed5fcf05d97d257f4131e19479da18f5d16.patch | 91 | ||||
-rw-r--r-- | sys-kernel/linux-image-redcore-lts-legacy/linux-image-redcore-lts-legacy-4.19.108-r2.ebuild (renamed from sys-kernel/linux-image-redcore-lts-legacy/linux-image-redcore-lts-legacy-4.19.108-r1.ebuild) | 3 |
2 files changed, 93 insertions, 1 deletions
diff --git a/sys-kernel/linux-image-redcore-lts-legacy/files/4.19-revert_52918ed5fcf05d97d257f4131e19479da18f5d16.patch b/sys-kernel/linux-image-redcore-lts-legacy/files/4.19-revert_52918ed5fcf05d97d257f4131e19479da18f5d16.patch new file mode 100644 index 00000000..d64d8efb --- /dev/null +++ b/sys-kernel/linux-image-redcore-lts-legacy/files/4.19-revert_52918ed5fcf05d97d257f4131e19479da18f5d16.patch @@ -0,0 +1,91 @@ +From a4e761c9f63ae12c5e2fc586b77082fd07e54212 Mon Sep 17 00:00:00 2001 +From: Tom Lendacky <thomas.lendacky@amd.com> +Date: Thu, 9 Jan 2020 17:42:16 -0600 +Subject: KVM: SVM: Override default MMIO mask if memory encryption is enabled + +commit 52918ed5fcf05d97d257f4131e19479da18f5d16 upstream. + +The KVM MMIO support uses bit 51 as the reserved bit to cause nested page +faults when a guest performs MMIO. The AMD memory encryption support uses +a CPUID function to define the encryption bit position. Given this, it is +possible that these bits can conflict. + +Use svm_hardware_setup() to override the MMIO mask if memory encryption +support is enabled. Various checks are performed to ensure that the mask +is properly defined and rsvd_bits() is used to generate the new mask (as +was done prior to the change that necessitated this patch). + +Fixes: 28a1f3ac1d0c ("kvm: x86: Set highest physical address bits in non-present/reserved SPTEs") +Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com> +Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com> +Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> +Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + arch/x86/kvm/svm.c | 43 +++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + +diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c +index 0219693bf08e..3f0565e1a7a8 100644 +--- a/arch/x86/kvm/svm.c ++++ b/arch/x86/kvm/svm.c +@@ -1298,6 +1298,47 @@ static void shrink_ple_window(struct kvm_vcpu *vcpu) + control->pause_filter_count, old); + } + ++/* ++ * The default MMIO mask is a single bit (excluding the present bit), ++ * which could conflict with the memory encryption bit. Check for ++ * memory encryption support and override the default MMIO mask if ++ * memory encryption is enabled. ++ */ ++static __init void svm_adjust_mmio_mask(void) ++{ ++ unsigned int enc_bit, mask_bit; ++ u64 msr, mask; ++ ++ /* If there is no memory encryption support, use existing mask */ ++ if (cpuid_eax(0x80000000) < 0x8000001f) ++ return; ++ ++ /* If memory encryption is not enabled, use existing mask */ ++ rdmsrl(MSR_K8_SYSCFG, msr); ++ if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT)) ++ return; ++ ++ enc_bit = cpuid_ebx(0x8000001f) & 0x3f; ++ mask_bit = boot_cpu_data.x86_phys_bits; ++ ++ /* Increment the mask bit if it is the same as the encryption bit */ ++ if (enc_bit == mask_bit) ++ mask_bit++; ++ ++ /* ++ * If the mask bit location is below 52, then some bits above the ++ * physical addressing limit will always be reserved, so use the ++ * rsvd_bits() function to generate the mask. This mask, along with ++ * the present bit, will be used to generate a page fault with ++ * PFER.RSV = 1. ++ * ++ * If the mask bit location is 52 (or above), then clear the mask. ++ */ ++ mask = (mask_bit < 52) ? rsvd_bits(mask_bit, 51) | PT_PRESENT_MASK : 0; ++ ++ kvm_mmu_set_mmio_spte_mask(mask, PT_WRITABLE_MASK | PT_USER_MASK); ++} ++ + static __init int svm_hardware_setup(void) + { + int cpu; +@@ -1352,6 +1393,8 @@ static __init int svm_hardware_setup(void) + } + } + ++ svm_adjust_mmio_mask(); ++ + for_each_possible_cpu(cpu) { + r = svm_cpu_init(cpu); + if (r) +-- +cgit 1.2-0.3.lf.el7 + diff --git a/sys-kernel/linux-image-redcore-lts-legacy/linux-image-redcore-lts-legacy-4.19.108-r1.ebuild b/sys-kernel/linux-image-redcore-lts-legacy/linux-image-redcore-lts-legacy-4.19.108-r2.ebuild index 69ef52ee..325575ec 100644 --- a/sys-kernel/linux-image-redcore-lts-legacy/linux-image-redcore-lts-legacy-4.19.108-r1.ebuild +++ b/sys-kernel/linux-image-redcore-lts-legacy/linux-image-redcore-lts-legacy-4.19.108-r2.ebuild @@ -5,7 +5,7 @@ EAPI=6 inherit eutils -EXTRAVERSION="redcore-lts-legacy-r1" +EXTRAVERSION="redcore-lts-legacy-r2" KV_FULL="${PV}-${EXTRAVERSION}" KV_MAJOR="4.19" @@ -40,6 +40,7 @@ PATCHES=( "${FILESDIR}"/"${KV_MAJOR}"-mute-pps_state_mismatch.patch "${FILESDIR}"/"${KV_MAJOR}"-nouveau-pascal-backlight.patch "${FILESDIR}"/"${KV_MAJOR}"-radeon_dp_aux_transfer_native-no-ratelimited_debug.patch + "${FILESDIR}"/"${KV_MAJOR}"-revert_52918ed5fcf05d97d257f4131e19479da18f5d16.patch "${FILESDIR}"/"${KV_MAJOR}"-linux-hardened.patch "${FILESDIR}"/"${KV_MAJOR}"-uksm-linux-hardened.patch "${FILESDIR}"/"${KV_MAJOR}"-0001-MultiQueue-Skiplist-Scheduler-version-v0.180-linux-hardened.patch |