BDEPEND=>=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=install prepare
DEPEND=dev-util/gperf sys-libs/readline:0 sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=7
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
IUSE=examples
KEYWORDS=~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc ~x86
LICENSE=LGPL-2.1
RDEPEND=sys-libs/readline:0 sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/steveicarus/iverilog/archive/v10_3.tar.gz -> iverilog-10.3.tar.gz
_eclasses_=autotools	ea7865c8fba1ea8d3639f355fffe1a3c	libtool	f143db5a74ccd9ca28c1234deffede96	multilib	1d91b03d42ab6308b5f4f6b598ed110e	toolchain-funcs	512eb3367f507ebaa1d1d43ab7d66e6c
_md5_=4611de40096aeefee1484ed1e55c1b3b