From 22910f5d14da606bd7f06e19a2f61c5d1a8fc94b Mon Sep 17 00:00:00 2001
From: V3n3RiX <venerix@redcorelinux.org>
Date: Fri, 25 May 2018 15:22:17 +0100
Subject: gentoo resync : 25.05.2018

---
 sys-firmware/intel-microcode/Manifest              |   5 +-
 .../intel-microcode-20180426-r1.ebuild             | 142 +++++++++++++++++++++
 sys-firmware/intel-microcode/metadata.xml          |   1 +
 3 files changed, 147 insertions(+), 1 deletion(-)
 create mode 100644 sys-firmware/intel-microcode/intel-microcode-20180426-r1.ebuild

(limited to 'sys-firmware/intel-microcode')

diff --git a/sys-firmware/intel-microcode/Manifest b/sys-firmware/intel-microcode/Manifest
index 6755a668feb3..67d6fc334ddb 100644
--- a/sys-firmware/intel-microcode/Manifest
+++ b/sys-firmware/intel-microcode/Manifest
@@ -1,5 +1,6 @@
 AUX intel-microcode2ucode.c 3484 BLAKE2B ff203133c00813884e61a7e1c3cfd5ca34cc8b6bbbac2940e0f9161594355d6d2ed9aa96e83c7d5dd64559ad7945e7daf0bb84d64831128a86970e4e1d3a73e1 SHA512 0e29f995dee47707026cfb6224580c2166d000e91af7b1afe12f00158be8606093d07cdbc0d583a0af79370cf1d9c16b5f35a306bae7f545a5c774ea253509b7
 AUX intel-microcode2ucode.c-r1 3533 BLAKE2B 5d6863c069526ae472bc4510b0900017ddd9d7723e86241536eff7b97a225c15bab8d53f14872a7bab7d5599ad0f0492b8df50baa5d3edc01c4d32808b1781ad SHA512 2b234a0080461f27440047d870b3a2769425499c35807f6ccc89a31e4ee87a14bc74ed2ca95a8b9744f07b93f8042a3d6486cda07011585e3e634663834ca49e
+DIST intel-microcode-collection-20180426.tar.xz 4155132 BLAKE2B 222c48ba0123887b4ae299e0acc4696512dc1c7528f1b735dd79b2d2f0bf6d988d061e773fb3949b2ab9ddcb69e4224ddb431ccda1c4b329ca37e9409ca60380 SHA512 038d43cd698183baa14b14f1b05e76c93386568494b2621e49338cf3c02fd0e663284ca864a50b3df4188bde5669bf4794cdcf7f4a287dcd42efbb8717809990
 DIST microcode-20140430.tgz 785594 BLAKE2B e51a187ca99ad496804f117871b50693b03b50759c9dd23002149ff7fa4b74888c83e8e1fcf078a973dea82e6a9439de8415c56c902ed0163e55ceaaff0eaf23 SHA512 12954522629ce15c4b95c158b6288b3877a3d1f87bea838f8138e53987ef1b6c0edc7a8cbb802a981ccca178b70b4323907aafa7479c0c2fed4497f6fb7bbc1c
 DIST microcode-20140624.tgz 787237 BLAKE2B 1c2d8f39bf142570283e80f370f41c502ef04d24b4348ca4b44c881e3b1e54df72a88e09350d45a33d47d9955d84a80ae8a11e44561b1a8944a59f9326d4d81a SHA512 c774006aae639e7fae90bc1f5d8308b407e7cd3b7d0da6e35577560bf6201c2b15f7d7b6b0cd727c50be1e9d508b484b067856631fa2598498982109bff0e44c
 DIST microcode-20140913.tgz 830537 BLAKE2B 665c72fc3a3e1e13d9e58eba0ed202b30856532eee590006c02112df926b879985a97ba9a96b58a6aad0285bff95a3fbb27b22d533f958fe170887f0ab37eef1 SHA512 e179fe0001b1157cc95aee39185f51fd182d53c1bdb30bfc95bc3a70795c32012050f3a4adf06735a77d8ef9c703a330c6a2610b73b70f09f5760e31d39cb89c
@@ -15,6 +16,7 @@ DIST microcode-20171117_p20171215-r1.tgz 1477015 BLAKE2B 3911aed3bbbd350be69a99b
 DIST microcode-20171117_p20171215.tgz 1468587 BLAKE2B 58777a39f843ae880f7dd8971a9570dbfc176d69541bb9d3cdc948d7be71a7df2559265fb1c8a199bc7567bb5a60176ade1d2c36624d0193dbac98d82401d0dd SHA512 25db94dbf18b1fea9497ec1e61bb5349d7bc78b0578d8869546bc3ec579b96bee7cd62657e66ebd3d4616805e85d790ac7ee7c0fed70b5db30236ffd12b33293
 DIST microcode-20180108.tgz 3676678 BLAKE2B 197e0188e516a3071be9e2e7a6261d78208613db8b746c7df533ce37884197dbd06a4e6ab027cbddba38903f590130f2d974e46da8fbab0613561523653460ab SHA512 f4010d83353948df27beeb804ef11e4f019f63397a4936f9d139e2842f7944d1ae864b9376987eaffc7db5b97201d5de2f4c1d7cc6b0f545ae15ec53a61fce2b
 DIST microcode-20180312.tgz 3789662 BLAKE2B e948d74833fe75b9bbdff1e4676f5d49a13bdd06aa6525c39be3448b822203947a5f55515484401ee0c96e8ade19ea580718949bed65883d983509661a16e637 SHA512 cc2cabf6d12c83b65eeb30fca7eb0b503e037dbee3d7ce9cb307b02ed8ac9426b2bafc2c1f1281dddff0945f8308f0d3cd320edea4596551354188d64760b854
+DIST microcode-20180425.tgz 1565473 BLAKE2B 70e0a56f0f5f720e00ab18d6553bc221147589e83df34fdc0c130c6f74a239e48355bfe1845b1de919ed1bce9ade7b7db298883eb3de1d53732a694b15d76f62 SHA512 6cea53cc0f486891fb9ddffc1e03e8e0a6d1d91df6bfda81250b2c60714e7b4111caa9df5afa7f13d8144e591550ef7eb4fd1e153fc67fc904afb83ccc2e3bb0
 EBUILD intel-microcode-20140430.ebuild 1169 BLAKE2B eab5c169361c8954bc6adf7035e2cdcb6602cd777cc0d02fc9308f0be06863c1e760e23e01c47458d329a11dfc5a6dd4bc5acc2eab88d4c6e4b7e9ff23515e71 SHA512 c0b31a6fcac608c7ba811b4ffc068172fdaed22c58dc29a5526275b0935d7c9210381978f224f419ca4071dd79d04ba3b8e2e788e5d2343bc46bcb3b4a3c570a
 EBUILD intel-microcode-20140624.ebuild 1171 BLAKE2B 9376abe8e21dbafb22978fc8607638380a6d69727df313300b4527a6afbaf56d74a72432b57d2b67cfad829aa2b93da8a2bd4e93d86ed6e44c704fbab0a512c5 SHA512 c8ea78ebe459ff578f11c06c29fa58f87793f1b5ea6f7b93586af36ecc586cc5f03576b71f15b729c0c9bb97886244de4febb2dcd73fa6206ffb312622ff83c9
 EBUILD intel-microcode-20140913.ebuild 1171 BLAKE2B ecb957649f70ff9e0cd52b7332870f5cb3917afde0e19e7bfc250e777468e39d2cece9dc5265962b0b779abca5e36c4f43793b5d2d30f9e24c66d5467a0d554a SHA512 a52bd7f6e9b2e35d207d6a3f819576e8654435220034631ac26a352159fc34edd6cc49d3545f50dcbb44ea824be59dd775938c86f432226e8334c5bcc12c4f8e
@@ -33,4 +35,5 @@ EBUILD intel-microcode-20171117_p20171215.ebuild 1149 BLAKE2B 54add03072f87c0e10
 EBUILD intel-microcode-20180108-r1.ebuild 2589 BLAKE2B aa50ed2760d43058427b2f01a4d7464f4ed2539d5c9adcf45034cf6a52d36d00557c12e244eaae4dfc2ac0f0381a58f4e44f971edc2bf279e39ecf1f8b7396ba SHA512 24e62065e2a261591d765b1fd2b7097ff99ac44f973bf5e22f07ba4615293c90b79bab135de09312e78cc2c2a07ac1b857309923b4b560adf1fdfff88dcc3980
 EBUILD intel-microcode-20180108.ebuild 1328 BLAKE2B 27e9dfb4283a5ed844514b1fc0df0afe793776454fd9748fd00b68947834465a667b86e9b262a4161d142b42fef80651391fcf872857abaeef66de5492528f3c SHA512 d6a0b50abe64c41bac70172e0672442e46458789ee9fac3df39f91c66f16011f4bd639dcb3cbe236429223d4d51c581ed345e2048bfce205c98a3b05a580839b
 EBUILD intel-microcode-20180312.ebuild 2590 BLAKE2B cf489e4899380a5672e78fd5d8f81f5896dda301d1f82478301c1367839285631d0e1d90e67a676b59ff68b65823f7ff5354a7ac227866304457efab1ff98ccd SHA512 325b6917aa5415145ba1193d59b8a57b5667e0fea8fb3dd3d97bc0ad2e1172a5f161f94e660aebfee4057cb5f11dfcb3e3935bc4664b339b8250bc45510d47a3
-MISC metadata.xml 570 BLAKE2B d49b45c4dff6e9116a388c1ab183461f609d31ed2f07c9145847b1cbb30ebf54922fb2474be2947d8668f7dfa5e06f4ac2beb7ab2b39a90976901a16862a3ef9 SHA512 f0c8094b68e2cb452975b01fbdb8c32f031fe1ef26971d518245dd886d2da8ab6c058d61cb4b4b9b1cb56a754cd08c3ef3fa30e280042675fa2d8705874a763e
+EBUILD intel-microcode-20180426-r1.ebuild 4719 BLAKE2B 39885862ddf77f6d7029dc34827ecc24dad5a38ed8a715858a751b928670720105a839b60e3bed804077bf4727088e2c9a743c9132be11eda77b2f34ba1e4d4a SHA512 5e1ce72701fc5934104725b7d33b90bb76f1ee3341e4ac7ba88e798d5fc35458d77bb258733a7448ec2d12a4c81ec7159bfe8f505892262efad442b9baaa36e5
+MISC metadata.xml 670 BLAKE2B cf668e9fce0c28a0522522b983874abccf81ace0910587f759225a703c9ac3760a233d217bf6589a4b76bd42d07e40854a21b171c36bc95cfd45011babf27b2b SHA512 2d6bb1ea8f2a89193edfdf33a688128b98a5b011856374c2f8e13becce25b609f797a2037c973bd12be26314738d4369574c431485659f3fada6feec3e4181a9
diff --git a/sys-firmware/intel-microcode/intel-microcode-20180426-r1.ebuild b/sys-firmware/intel-microcode/intel-microcode-20180426-r1.ebuild
new file mode 100644
index 000000000000..29a6958681db
--- /dev/null
+++ b/sys-firmware/intel-microcode/intel-microcode-20180426-r1.ebuild
@@ -0,0 +1,142 @@
+# Copyright 1999-2018 Gentoo Foundation
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI="6"
+
+inherit linux-info toolchain-funcs mount-boot
+
+# Find updates by searching and clicking the first link (hopefully it's the one):
+# http://www.intel.com/content/www/us/en/search.html?keyword=Processor+Microcode+Data+File
+
+COLLECTION_SNAPSHOT="20180426"
+INTEL_SNAPSHOT="20180425"
+NUM="27776"
+DESCRIPTION="Intel IA32/IA64 microcode update data"
+HOMEPAGE="http://inertiawar.com/microcode/ https://downloadcenter.intel.com/Detail_Desc.aspx?DwnldID=${NUM}"
+SRC_URI="https://downloadmirror.intel.com/${NUM}/eng/microcode-${INTEL_SNAPSHOT}.tgz
+	https://dev.gentoo.org/~whissi/dist/intel-microcode/intel-microcode-collection-${COLLECTION_SNAPSHOT}.tar.xz"
+
+LICENSE="intel-ucode"
+SLOT="0"
+KEYWORDS=""
+IUSE="initramfs +split-ucode vanilla"
+REQUIRED_USE="|| ( initramfs split-ucode )"
+
+DEPEND="sys-apps/iucode_tool"
+RDEPEND="!<sys-apps/microcode-ctl-1.17-r2" #268586
+
+S=${WORKDIR}
+
+# Blacklist bad microcode here.
+# 0x000406f1 aka 06-4f-01 aka CPUID 406F1 require newer microcode loader
+MICROCODE_BLACKLIST_DEFAULT="-s !0x000406f1"
+MICROCODE_BLACKLIST="${MICROCODE_BLACKLIST:=${MICROCODE_BLACKLIST_DEFAULT}}"
+
+# In case we want to set some defaults ...
+MICROCODE_SIGNATURES_DEFAULT=""
+
+# Advanced users only:
+# merge with:
+# only current CPU: MICROCODE_SIGNATURES="-S"
+# only specific CPU: MICROCODE_SIGNATURES="-s 0x00000f4a -s 0x00010676"
+# exclude specific CPU: MICROCODE_SIGNATURES="-s !0x00000686"
+MICROCODE_SIGNATURES="${MICROCODE_SIGNATURES:=${MICROCODE_SIGNATURES_DEFAULT}}"
+
+pkg_pretend() {
+	if [[ "${MICROCODE_BLACKLIST}" != "${MICROCODE_BLACKLIST_DEFAULT}" ]]; then
+		ewarn "MICROCODE_BLACKLIST is set to \"${MICROCODE_BLACKLIST}\" instead of default \"${MICROCODE_BLACKLIST_DEFAULT}\". You are on your own!"
+	fi
+
+	if [[ "${MICROCODE_SIGNATURES}" != "${MICROCODE_SIGNATURES_DEFAULT}" ]]; then
+		ewarn "The user has opted in for advanced use:"
+		ewarn "MICROCODE_SIGNATURES is set to \"${MICROCODE_SIGNATURES}\" instead of default \"${MICROCODE_SIGNATURES_DEFAULT}\"!"
+	fi
+
+	use initramfs && mount-boot_pkg_pretend
+}
+
+src_prepare() {
+	default
+
+	# Prevent "invalid file format" errors from iucode_tool
+	rm -f "${S}"/intel-ucod*/list || die
+}
+
+src_install() {
+	# This will take ALL of the upstream microcode sources:
+	# - microcode.dat
+	# - intel-ucode/
+	# In some cases, they have not contained the same content (eg the directory has newer stuff).
+	MICROCODE_SRC=(
+		"${S}"/intel-ucode/
+		"${S}"/intel-ucode-with-caveats/
+	)
+
+	# Allow users who are scared about microcode updates not included in Intel's official
+	# microcode tarball to opt-out and comply with Intel marketing
+	if ! use vanilla; then
+		MICROCODE_SRC+=( "${S}"/intel-microcode-collection-${COLLECTION_SNAPSHOT} )
+	fi
+
+	opts=(
+		${MICROCODE_BLACKLIST}
+		${MICROCODE_SIGNATURES}
+		# be strict about what we are doing
+		--overwrite
+		--strict-checks
+		--no-ignore-broken
+		# we want to install latest version
+		--no-downgrade
+		# show everything we find
+		--list-all
+		# show what we selected
+		--list
+	)
+
+	# The earlyfw cpio needs to be in /boot because it must be loaded before
+	# rootfs is mounted.
+	use initramfs && dodir /boot && opts+=( --write-earlyfw="${ED%/}"/boot/intel-uc.img )
+	# split location:
+	use split-ucode && dodir /lib/firmware/intel-ucode && opts+=( --write-firmware="${ED%/}"/lib/firmware/intel-ucode )
+
+	iucode_tool \
+		"${opts[@]}" \
+		"${MICROCODE_SRC[@]}" \
+		|| die "iucode_tool ${opts[@]} ${MICROCODE_SRC[@]}"
+
+	dodoc releasenote
+}
+
+pkg_preinst() {
+	use initramfs && mount-boot_pkg_preinst
+}
+
+pkg_prerm() {
+	use initramfs && mount-boot_pkg_prerm
+}
+
+pkg_postrm() {
+	use initramfs && mount-boot_pkg_postrm
+}
+
+pkg_postinst() {
+	use initramfs && mount-boot_pkg_postinst
+
+	# We cannot give detailed information if user is affected or not:
+	# If MICROCODE_BLACKLIST wasn't modified, user can still use MICROCODE_SIGNATURES
+	# to to force a specific, otherwise blacklisted, microcode. So we
+	# only show a generic warning based on running kernel version:
+	if kernel_is -lt 4 14 34; then
+		ewarn "${P} contains microcode updates which require"
+		ewarn "additional kernel patches which aren't yet included in kernel <4.14.34."
+		ewarn "Loading such a microcode through kernel interface from an unpatched kernel"
+		ewarn "can crash your system!"
+		ewarn ""
+		ewarn "Those microcodes are blacklisted per default. However, if you have altered"
+		ewarn "MICROCODE_BLACKLIST or MICROCODE_SIGNATURES, you maybe have unintentionally"
+		ewarn "re-enabled those microcodes...!"
+		ewarn ""
+		ewarn "Check ${EROOT%/}/usr/share/doc/${P}/releasenot* if your microcode update"
+		ewarn "requires additional kernel patches or not."
+	fi
+}
diff --git a/sys-firmware/intel-microcode/metadata.xml b/sys-firmware/intel-microcode/metadata.xml
index f8bcf6658dd3..2d96b231657b 100644
--- a/sys-firmware/intel-microcode/metadata.xml
+++ b/sys-firmware/intel-microcode/metadata.xml
@@ -9,5 +9,6 @@
 	<flag name="initramfs">install a small initramfs for use with CONFIG_MICROCODE_EARLY</flag>
 	<flag name="monolithic">install the large text microcode.dat (used by older kernels via microcode_ctl)</flag>
 	<flag name="split-ucode">install the split binary ucode files (used by the kernel directly)</flag>
+	<flag name="vanilla">install only microcode updates from Intel's official microcode tarball</flag>
 </use>
 </pkgmetadata>
-- 
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