From f29eb0598f62fc3b5f09f2de5a89c0437c6164d9 Mon Sep 17 00:00:00 2001 From: V3n3RiX Date: Tue, 21 Jan 2020 18:52:40 +0000 Subject: gentoo resync : 21.01.2020 --- sys-devel/gdb/files/gdb-8.3.1-gcc-10.patch | 222 +++++++++++++++++++++++++++++ 1 file changed, 222 insertions(+) create mode 100644 sys-devel/gdb/files/gdb-8.3.1-gcc-10.patch (limited to 'sys-devel/gdb/files/gdb-8.3.1-gcc-10.patch') diff --git a/sys-devel/gdb/files/gdb-8.3.1-gcc-10.patch b/sys-devel/gdb/files/gdb-8.3.1-gcc-10.patch new file mode 100644 index 000000000000..affc3b7392a4 --- /dev/null +++ b/sys-devel/gdb/files/gdb-8.3.1-gcc-10.patch @@ -0,0 +1,222 @@ +From 851c0536cabb661847c45c73ebd796eb3299066b Mon Sep 17 00:00:00 2001 +Date: Tue, 26 Nov 2019 12:52:56 -0300 +Subject: [PATCH] [ARM, sim] Fix build error and warnings +From: Luis Machado + +Newer GCC's have switched to -fno-common by default, and this breaks the build +for the ARM sim, like this: + +binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:65: multiple definition of `DSPsc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:134: first defined here +binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:64: multiple definition of `DSPacc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:133: first defined here +binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:63: multiple definition of `DSPregs'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:132: first defined here + +I also noticed a few warnings due to mismatching types, as follows: + +../../../../repos/binutils-gdb/sim/arm/wrapper.c: In function ‘sim_create_inferior’: +../../../../repos/binutils-gdb/sim/arm/wrapper.c:335:16: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] + for (arg = argv; *arg != NULL; arg++) + ^ +../../../../repos/binutils-gdb/sim/arm/wrapper.c:342:8: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] + arg = argv; + ^ +../../../../repos/binutils-gdb/sim/arm/wrapper.c:345:13: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] + for (arg = argv; *arg != NULL; arg++) + ^ +The following patch fixes both of the above. + +Change-Id: I21db699d3b61b2de8c44053e47be4387285af28f +--- + sim/arm/armemu.c | 4 ---- + sim/arm/arminit.c | 4 ++++ + sim/arm/maverick.c | 35 +++++------------------------------ + sim/arm/maverick.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++ + sim/arm/wrapper.c | 35 ++--------------------------------- + create mode 100644 sim/arm/maverick.h + +--- a/sim/arm/armemu.c ++++ b/sim/arm/armemu.c +@@ -1140,10 +1140,6 @@ handle_VFP_move (ARMul_State * state, ARMword instr) + + /* EMULATION of ARM6. */ + +-/* The PC pipeline value depends on whether ARM +- or Thumb instructions are being executed. */ +-ARMword isize; +- + ARMword + #ifdef MODE32 + ARMul_Emulate32 (ARMul_State * state) +--- a/sim/arm/arminit.c ++++ b/sim/arm/arminit.c +@@ -40,6 +40,10 @@ unsigned ARMul_MultTable[32] = + ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */ + char ARMul_BitList[256]; /* number of bits in a byte table */ + ++/* The PC pipeline value depends on whether ARM ++ or Thumb instructions are being executed. */ ++ARMword isize; ++ + /***************************************************************************\ + * Call this routine once to set up the emulator's tables. * + \***************************************************************************/ +--- a/sim/arm/maverick.c ++++ b/sim/arm/maverick.c +@@ -19,6 +19,7 @@ + #include "armdefs.h" + #include "ansidecl.h" + #include "armemu.h" ++#include "maverick.h" + + /*#define CIRRUS_DEBUG 1 */ + #if CIRRUS_DEBUG +@@ -30,36 +31,10 @@ + #define POS64(i) ( (~(i)) >> 63 ) + #define NEG64(i) ( (i) >> 63 ) + +-/* Define Co-Processor instruction handlers here. */ +- +-/* Here's ARMulator's DSP definition. A few things to note: +- 1) it has 16 64-bit registers and 4 72-bit accumulators +- 2) you can only access its registers with MCR and MRC. */ +- +-/* We can't define these in here because this file might not be linked +- unless the target is arm9e-*. They are defined in wrapper.c. +- Eventually the simulator should be made to handle any coprocessor +- at run time. */ +-struct maverick_regs +-{ +- union +- { +- int i; +- float f; +- } upper; +- +- union +- { +- int i; +- float f; +- } lower; +-}; +- +-union maverick_acc_regs +-{ +- long double ld; /* Acc registers are 72-bits. */ +-}; +- ++/* These variables are defined here and made extern in maverick.h for use ++ in wrapper.c for now. ++ Eventually the simulator should be made to handle any coprocessor at run ++ time. */ + struct maverick_regs DSPregs[16]; + union maverick_acc_regs DSPacc[4]; + ARMword DSPsc; +--- /dev/null ++++ b/sim/arm/maverick.h +@@ -0,0 +1,46 @@ ++/* maverick.h -- Cirrus/DSP co-processor interface header ++ Copyright (C) 2003-2019 Free Software Foundation, Inc. ++ Contributed by Aldy Hernandez (aldyh@redhat.com). ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ ++/* Define Co-Processor instruction handlers here. */ ++ ++/* Here's ARMulator's DSP definition. A few things to note: ++ 1) it has 16 64-bit registers and 4 72-bit accumulators ++ 2) you can only access its registers with MCR and MRC. */ ++ ++struct maverick_regs ++{ ++ union ++ { ++ int i; ++ float f; ++ } upper; ++ ++ union ++ { ++ int i; ++ float f; ++ } lower; ++}; ++ ++union maverick_acc_regs ++{ ++ long double ld; /* Acc registers are 72-bits. */ ++}; ++ ++extern struct maverick_regs DSPregs[16]; ++extern union maverick_acc_regs DSPacc[4]; ++extern ARMword DSPsc; +--- a/sim/arm/wrapper.c ++++ b/sim/arm/wrapper.c +@@ -37,6 +37,7 @@ + #include "gdb/signals.h" + #include "libiberty.h" + #include "iwmmxt.h" ++#include "maverick.h" + + /* TODO: This should get pulled from the SIM_DESC. */ + host_callback *sim_callback; +@@ -101,38 +102,6 @@ print_insn (ARMword instr) + fprintf (stderr, " %*s\n", size, opbuf); + } + +-/* Cirrus DSP registers. +- +- We need to define these registers outside of maverick.c because +- maverick.c might not be linked in unless --target=arm9e-* in which +- case wrapper.c will not compile because it tries to access Cirrus +- registers. This should all go away once we get the Cirrus and ARM +- Coprocessor to coexist in armcopro.c-- aldyh. */ +- +-struct maverick_regs +-{ +- union +- { +- int i; +- float f; +- } upper; +- +- union +- { +- int i; +- float f; +- } lower; +-}; +- +-union maverick_acc_regs +-{ +- long double ld; /* Acc registers are 72-bits. */ +-}; +- +-struct maverick_regs DSPregs[16]; +-union maverick_acc_regs DSPacc[4]; +-ARMword DSPsc; +- + static void + init (void) + { +@@ -236,7 +205,7 @@ sim_create_inferior (SIM_DESC sd ATTRIBUTE_UNUSED, + { + int argvlen = 0; + int mach; +- char **arg; ++ char * const *arg; + + init (); + +-- +2.25.0 + -- cgit v1.2.3