From 67f76a858f1ac826bd8a550d756d9ec6e340ed4f Mon Sep 17 00:00:00 2001 From: V3n3RiX Date: Sat, 27 Jan 2018 18:07:28 +0000 Subject: gentoo resync : 27.01.2018 --- metadata/md5-cache/sci-electronics/Manifest.gz | Bin 16124 -> 16288 bytes metadata/md5-cache/sci-electronics/iverilog-10.2 | 12 ++++++++++++ 2 files changed, 12 insertions(+) create mode 100644 metadata/md5-cache/sci-electronics/iverilog-10.2 (limited to 'metadata/md5-cache/sci-electronics') diff --git a/metadata/md5-cache/sci-electronics/Manifest.gz b/metadata/md5-cache/sci-electronics/Manifest.gz index c7bca2af0609..c6a3e7495d17 100644 Binary files a/metadata/md5-cache/sci-electronics/Manifest.gz and b/metadata/md5-cache/sci-electronics/Manifest.gz differ diff --git a/metadata/md5-cache/sci-electronics/iverilog-10.2 b/metadata/md5-cache/sci-electronics/iverilog-10.2 new file mode 100644 index 000000000000..c2ccfae8e7b2 --- /dev/null +++ b/metadata/md5-cache/sci-electronics/iverilog-10.2 @@ -0,0 +1,12 @@ +DEFINED_PHASES=install +DEPEND=app-arch/bzip2 sys-libs/readline:0= sys-libs/zlib:= +DESCRIPTION=A Verilog simulation and synthesis tool +EAPI=6 +HOMEPAGE=http://iverilog.icarus.com/ +IUSE=examples +KEYWORDS=~amd64 ~ppc ~sparc ~x86 +LICENSE=GPL-2 +RDEPEND=app-arch/bzip2 sys-libs/readline:0= sys-libs/zlib:= +SLOT=0 +SRC_URI=ftp://icarus.com/pub/eda/verilog/v10/verilog-10.2.tar.gz +_md5_=9fe4104a245392cdea2cb1101e623711 -- cgit v1.2.3