From b71bf04bdb3f690dbd36fcda860a5a68c1988f6e Mon Sep 17 00:00:00 2001 From: V3n3RiX Date: Thu, 12 Oct 2023 06:14:08 +0100 Subject: gentoo auto-resync : 12:10:2023 - 06:14:07 --- dev-util/intel-graphics-compiler/Manifest | 2 +- .../intel-graphics-compiler-1.0.14062.11-vc.patch | 52 ++++++++++++++-------- 2 files changed, 34 insertions(+), 20 deletions(-) (limited to 'dev-util/intel-graphics-compiler') diff --git a/dev-util/intel-graphics-compiler/Manifest b/dev-util/intel-graphics-compiler/Manifest index 28b371df0d05..f474d510de99 100644 --- a/dev-util/intel-graphics-compiler/Manifest +++ b/dev-util/intel-graphics-compiler/Manifest @@ -1,4 +1,4 @@ -AUX intel-graphics-compiler-1.0.14062.11-vc.patch 2255 BLAKE2B 662a4ceaf48598fb7a8fe1c6f2af2049a1109ca28283610433211414bd8fd20e52d16d1714d8370a480c4743f84e3f698cf6f45e619f01eb8c069cb6f817a9e6 SHA512 a600b551f4e6c3f24af073ca602c286aa09daa87ee370903f3eceec43c66ebba64fb07c137181d0245a82ccae1470862c33058ff4b669c297b0808247b47a065 +AUX intel-graphics-compiler-1.0.14062.11-vc.patch 3035 BLAKE2B fb1e087985d84e7cabcb34ae19f3af3aaf4c05a485f58243cc9c3c2fc60b1ae002fd1ec126d926cfe5afc9233676dc0bd1231370a1b19e23df1fb9d743280e4d SHA512 1963161e696d4f926975faa795741bab24075bbf5537e99915ae4bfa402bd791499e658ea62cc56f8b3975671f9e91ddadca1424950bf1b39c57408617fed6e6 AUX intel-graphics-compiler-1.0.8173-opencl-clang_version.patch 1807 BLAKE2B ec6aac8c78d7584e043a258585cbae6218fd8aa167d853e1eea96313298df7347ab7652ec2bf83199129e07e534d52fcd200858036e3d0af2c4f79ff249104f2 SHA512 1a0db341aab280aa205965dfc82d17b29f681bde76932f8291243afad985523f601c7279b1fb772ebc4d9197e5016941a1ad07cea2b6d7199710a7ee22fd81dc AUX intel-graphics-compiler-1.0.8365-disable-git.patch 1140 BLAKE2B f870def1128c30c3e50a71e9eac39eccbcc9bc798be574324016c6c31ed3a3f82e1499f1aada5a2c475bd6b6c467b1b236635fdd6b5145904bc63dc53f8d75e5 SHA512 d1d53a6f4a47031ec4cdcf3f57c059536ccf571a72929da3d9070487686f91f4202d20c4d626da616250f66b31815b61fafa82b903b1f5157a226ee748097bda AUX intel-graphics-compiler-1.0.9-no_Werror.patch 272 BLAKE2B 079fe334413dfddb7681940f2a8920a365e8e72526cfc09ea1c7d218e8b19468f80ea9a215be125b441ee5238d7856b8dec02ebfc4bfd76b1850aa9917da35ef SHA512 d3d27943e84e228b480172b4fe91ba9aed8bb1c98700eb8c8beebafb7f1cc6265279031f56181e67eff74f55e1bbc8ee24bdc4d14fc1200c5aff670ef019410d diff --git a/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch b/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch index 778505f08068..7fc8e4f82c11 100644 --- a/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch +++ b/dev-util/intel-graphics-compiler/files/intel-graphics-compiler-1.0.14062.11-vc.patch @@ -1,59 +1,73 @@ +From 9be3363c1f9f97627566d88a56e6e612a74691b3 Mon Sep 17 00:00:00 2001 +From: Igor Gorban +Date: Mon, 9 Oct 2023 13:13:57 +0000 +Subject: [PATCH] Fix regression in release-build + +Thanks @frantisekz for point and triage problem +--- + .../lib/GenXCodeGen/GenXSimdCFConformance.cpp | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp +index ade15972379d..c5572e758833 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXSimdCFConformance.cpp -@@ -1867,11 +1867,13 @@ void GenXSimdCFConformance::ensureConformance() { +@@ -1867,11 +1867,12 @@ void GenXSimdCFConformance::ensureConformance() { IID != GenXIntrinsic::genx_simdcf_unmask && IID != GenXIntrinsic::genx_simdcf_remask) { EMValsStack.insert(*i); -+ #ifdef DEBUG_VERBOSE_ON ++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DEBUG(if (auto *Inst = dyn_cast(i->getValue())) { auto FuncName = Inst->getFunction()->getName(); - dbgs() << "Entry EMVals " << FuncName << " - "; - i->getValue()->dump(); +- dbgs() << "Entry EMVals " << FuncName << " - "; +- i->getValue()->dump(); ++ dbgs() << "Entry EMVals " << FuncName << " - " << *Inst << "\n"; }); -+ #endif ++#endif } } for (auto i = EMVals.begin(), e = EMVals.end(); i != e; ++i) { -@@ -1919,6 +1921,7 @@ void GenXSimdCFConformance::ensureConformance() { +@@ -1919,6 +1920,7 @@ void GenXSimdCFConformance::ensureConformance() { // been identified in the early pass, unless passes in between have // transformed the code in an unexpected way that has made the simd CF // non-conformant. Give an error here if this has happened. -+ #ifdef DEBUG_VERBOSE_ON ++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) if (!GotosToLower.empty()) { dbgs() << "Not empty GotosToLower:"; for (auto *Dump : GotosToLower) -@@ -1929,6 +1932,7 @@ void GenXSimdCFConformance::ensureConformance() { +@@ -1929,6 +1931,7 @@ void GenXSimdCFConformance::ensureConformance() { for (auto *Dump : JoinsToLower) Dump->dump(); } -+ #endif ++#endif IGC_ASSERT_EXIT_MESSAGE( GotosToLower.empty(), "unexpected non-conformant SIMD CF in late SIMD CF conformance pass"); -@@ -2460,8 +2464,10 @@ static bool checkAllUsesAreSelectOrWrRegion(Value *V) { +@@ -2460,9 +2463,9 @@ static bool checkAllUsesAreSelectOrWrRegion(Value *V) { auto User2 = cast(ui2->getUser()); unsigned OpNum = ui2->getOperandNo(); ++ui2; -+ #ifdef DEBUG_VERBOSE_ON - LLVM_DEBUG(dbgs() << "checkAllUsesAreSelectOrWrRegion: for user "; - User2->dump()); -+ #endif - +- LLVM_DEBUG(dbgs() << "checkAllUsesAreSelectOrWrRegion: for user "; +- User2->dump()); +- ++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) ++ LLVM_DEBUG(dbgs() << "checkAllUsesAreSelectOrWrRegion: for user " << *User2 << "\n"); ++#endif if (isa(User2)) continue; -@@ -3006,12 +3012,14 @@ bool GenXSimdCFConformance::getConnectedVals( + +@@ -3006,12 +3009,14 @@ bool GenXSimdCFConformance::getConnectedVals( } } else { if (!UsersToLower.empty()) { -+ #ifdef DEBUG_VERBOSE_ON ++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DEBUG(dbgs() << "getConnectedVals: find bad users:\n"; for (auto &BadUser : UsersToLower) { dbgs() << " "; BadUser.dump(); }); -+ #endif ++#endif return false; } } --- -- cgit v1.2.3