From 0f558761aa2dee1017b4751e4017205e015a9560 Mon Sep 17 00:00:00 2001 From: V3n3RiX Date: Wed, 29 Jun 2022 12:04:12 +0100 Subject: gentoo resync : 29.12.2022 --- .../files/1.61.0-gentoo-musl-target-specs.patch | 166 +++++++++++++++++++++ .../rust/files/1.61.0-llvm_addrspacecast.patch | 52 +++++++ .../files/1.61.0-llvm_selectInterleaveCount.patch | 66 ++++++++ dev-lang/rust/files/1.61.0-miri-cow.patch | 98 ++++++++++++ 4 files changed, 382 insertions(+) create mode 100644 dev-lang/rust/files/1.61.0-gentoo-musl-target-specs.patch create mode 100644 dev-lang/rust/files/1.61.0-llvm_addrspacecast.patch create mode 100644 dev-lang/rust/files/1.61.0-llvm_selectInterleaveCount.patch create mode 100644 dev-lang/rust/files/1.61.0-miri-cow.patch (limited to 'dev-lang/rust/files') diff --git a/dev-lang/rust/files/1.61.0-gentoo-musl-target-specs.patch b/dev-lang/rust/files/1.61.0-gentoo-musl-target-specs.patch new file mode 100644 index 000000000000..970148124365 --- /dev/null +++ b/dev-lang/rust/files/1.61.0-gentoo-musl-target-specs.patch @@ -0,0 +1,166 @@ +From 331c3839ebb0099101e1d2f88205ea42f4e3b319 Mon Sep 17 00:00:00 2001 +From: Georgy Yakovlev +Date: Tue, 24 May 2022 12:03:20 -0700 +Subject: [PATCH] add gentoo musl target specs + +--- + .../src/spec/aarch64_gentoo_linux_musl.rs | 11 + + .../src/spec/armv7_gentoo_linux_musleabihf.rs | 11 + + .../src/spec/i686_gentoo_linux_musl.rs | 11 + + compiler/rustc_target/src/spec/mod.rs | 8 + + compiler/rustc_target/src/spec/mod.rs.orig | 2465 +++++++++++++++++ + .../src/spec/powerpc64_gentoo_linux_musl.rs | 11 + + .../src/spec/powerpc64le_gentoo_linux_musl.rs | 11 + + .../src/spec/powerpc_gentoo_linux_musl.rs | 11 + + .../src/spec/x86_64_gentoo_linux_musl.rs | 11 + + 9 files changed, 2550 insertions(+) + create mode 100644 compiler/rustc_target/src/spec/aarch64_gentoo_linux_musl.rs + create mode 100644 compiler/rustc_target/src/spec/armv7_gentoo_linux_musleabihf.rs + create mode 100644 compiler/rustc_target/src/spec/i686_gentoo_linux_musl.rs + create mode 100644 compiler/rustc_target/src/spec/mod.rs.orig + create mode 100644 compiler/rustc_target/src/spec/powerpc64_gentoo_linux_musl.rs + create mode 100644 compiler/rustc_target/src/spec/powerpc64le_gentoo_linux_musl.rs + create mode 100644 compiler/rustc_target/src/spec/powerpc_gentoo_linux_musl.rs + create mode 100644 compiler/rustc_target/src/spec/x86_64_gentoo_linux_musl.rs + +diff --git a/compiler/rustc_target/src/spec/aarch64_gentoo_linux_musl.rs b/compiler/rustc_target/src/spec/aarch64_gentoo_linux_musl.rs +new file mode 100644 +index 0000000..ca5f28f +--- /dev/null ++++ b/compiler/rustc_target/src/spec/aarch64_gentoo_linux_musl.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::aarch64_unknown_linux_musl::target(); ++ ++ base.llvm_target = "aarch64-gentoo-linux-musl".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +diff --git a/compiler/rustc_target/src/spec/armv7_gentoo_linux_musleabihf.rs b/compiler/rustc_target/src/spec/armv7_gentoo_linux_musleabihf.rs +new file mode 100644 +index 0000000..24b3b30 +--- /dev/null ++++ b/compiler/rustc_target/src/spec/armv7_gentoo_linux_musleabihf.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::armv7_unknown_linux_musleabihf::target(); ++ ++ base.llvm_target = "armv7-gentoo-linux-musleabihf".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +diff --git a/compiler/rustc_target/src/spec/i686_gentoo_linux_musl.rs b/compiler/rustc_target/src/spec/i686_gentoo_linux_musl.rs +new file mode 100644 +index 0000000..cab0923 +--- /dev/null ++++ b/compiler/rustc_target/src/spec/i686_gentoo_linux_musl.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::i686_unknown_linux_musl::target(); ++ ++ base.llvm_target = "i686-gentoo-linux-musl".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs +index bd5b712..34b923b 100644 +--- a/compiler/rustc_target/src/spec/mod.rs ++++ b/compiler/rustc_target/src/spec/mod.rs +@@ -808,6 +808,14 @@ macro_rules! supported_targets { + } + + supported_targets! { ++ ("aarch64-gentoo-linux-musl", aarch64_gentoo_linux_musl), ++ ("armv7-gentoo-linux-musleabihf", armv7_gentoo_linux_musleabihf), ++ ("i686-gentoo-linux-musl", i686_gentoo_linux_musl), ++ ("powerpc-gentoo-linux-musl", powerpc_gentoo_linux_musl), ++ ("powerpc64-gentoo-linux-musl", powerpc64_gentoo_linux_musl), ++ ("powerpc64le-gentoo-linux-musl", powerpc64le_gentoo_linux_musl), ++ ("x86_64-gentoo-linux-musl", x86_64_gentoo_linux_musl), ++ + ("x86_64-unknown-linux-gnu", x86_64_unknown_linux_gnu), + ("x86_64-unknown-linux-gnux32", x86_64_unknown_linux_gnux32), + ("i686-unknown-linux-gnu", i686_unknown_linux_gnu), +diff --git a/compiler/rustc_target/src/spec/powerpc64_gentoo_linux_musl.rs b/compiler/rustc_target/src/spec/powerpc64_gentoo_linux_musl.rs +new file mode 100644 +index 0000000..b188a7c +--- /dev/null ++++ b/compiler/rustc_target/src/spec/powerpc64_gentoo_linux_musl.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::powerpc64_unknown_linux_musl::target(); ++ ++ base.llvm_target = "powerpc64-gentoo-linux-musl".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +diff --git a/compiler/rustc_target/src/spec/powerpc64le_gentoo_linux_musl.rs b/compiler/rustc_target/src/spec/powerpc64le_gentoo_linux_musl.rs +new file mode 100644 +index 0000000..395f603 +--- /dev/null ++++ b/compiler/rustc_target/src/spec/powerpc64le_gentoo_linux_musl.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::powerpc64le_unknown_linux_musl::target(); ++ ++ base.llvm_target = "powerpc64le-gentoo-linux-musl".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +diff --git a/compiler/rustc_target/src/spec/powerpc_gentoo_linux_musl.rs b/compiler/rustc_target/src/spec/powerpc_gentoo_linux_musl.rs +new file mode 100644 +index 0000000..cb3121d +--- /dev/null ++++ b/compiler/rustc_target/src/spec/powerpc_gentoo_linux_musl.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::powerpc_unknown_linux_musl::target(); ++ ++ base.llvm_target = "powerpc-gentoo-linux-musl".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +diff --git a/compiler/rustc_target/src/spec/x86_64_gentoo_linux_musl.rs b/compiler/rustc_target/src/spec/x86_64_gentoo_linux_musl.rs +new file mode 100644 +index 0000000..2fcdb66 +--- /dev/null ++++ b/compiler/rustc_target/src/spec/x86_64_gentoo_linux_musl.rs +@@ -0,0 +1,11 @@ ++use crate::spec::Target; ++ ++pub fn target() -> Target { ++ let mut base = super::x86_64_unknown_linux_musl::target(); ++ ++ base.llvm_target = "x86_64-gentoo-linux-musl".into(); ++ base.options.vendor = "gentoo".into(); ++ base.options.crt_static_default = false; ++ ++ base ++} +-- +2.35.1 + diff --git a/dev-lang/rust/files/1.61.0-llvm_addrspacecast.patch b/dev-lang/rust/files/1.61.0-llvm_addrspacecast.patch new file mode 100644 index 000000000000..9f2ca6ff667b --- /dev/null +++ b/dev-lang/rust/files/1.61.0-llvm_addrspacecast.patch @@ -0,0 +1,52 @@ +From 67a290460c374d5e0d18a06c798896cac0b19e59 Mon Sep 17 00:00:00 2001 +From: Fraser Cormack +Date: Wed, 16 Mar 2022 10:14:07 +0000 +Subject: [PATCH] [VectorCombine] Insert addrspacecast when crossing address + space boundaries + +We can not bitcast pointers across different address spaces. This was +previously fixed in D89577 but then in D93229 an enhancement was added +which peeks further through the ponter operand, opening up the +possibility that address-space violations could be introduced. + +Instead of bailing as the previous fix did, simply insert an +addrspacecast cast instruction. + +Reviewed By: lebedev.ri + +Differential Revision: https://reviews.llvm.org/D121787 + +(cherry picked from commit 2e44b7872bc638ed884ae4aa86e38b3b47e0b65a) +--- + llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 8 ++------ + .../AMDGPU/as-transition-inseltpoison.ll | 4 +--- + .../VectorCombine/AMDGPU/as-transition.ll | 4 +--- + .../VectorCombine/X86/load-inseltpoison.ll | 17 +++++++++++++++++ + 4 files changed, 21 insertions(+), 12 deletions(-) + +diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp +index 620d388199e0..258f6c67e54d 100644 +--- a/src/llvm-project/llvm/lib/Transforms/Vectorize/VectorCombine.cpp ++++ b/src/llvm-project/llvm/lib/Transforms/Vectorize/VectorCombine.cpp +@@ -152,12 +152,7 @@ bool VectorCombine::vectorizeLoadInsert(Instruction &I) { + Value *SrcPtr = Load->getPointerOperand()->stripPointerCasts(); + assert(isa(SrcPtr->getType()) && "Expected a pointer type"); + +- // If original AS != Load's AS, we can't bitcast the original pointer and have +- // to use Load's operand instead. Ideally we would want to strip pointer casts +- // without changing AS, but there's no API to do that ATM. + unsigned AS = Load->getPointerAddressSpace(); +- if (AS != SrcPtr->getType()->getPointerAddressSpace()) +- SrcPtr = Load->getPointerOperand(); + + // We are potentially transforming byte-sized (8-bit) memory accesses, so make + // sure we have all of our type-based constraints in place for this target. +@@ -245,7 +240,8 @@ bool VectorCombine::vectorizeLoadInsert(Instruction &I) { + // It is safe and potentially profitable to load a vector directly: + // inselt undef, load Scalar, 0 --> load VecPtr + IRBuilder<> Builder(Load); +- Value *CastedPtr = Builder.CreateBitCast(SrcPtr, MinVecTy->getPointerTo(AS)); ++ Value *CastedPtr = Builder.CreatePointerBitCastOrAddrSpaceCast( ++ SrcPtr, MinVecTy->getPointerTo(AS)); + Value *VecLd = Builder.CreateAlignedLoad(MinVecTy, CastedPtr, Alignment); + VecLd = Builder.CreateShuffleVector(VecLd, Mask); diff --git a/dev-lang/rust/files/1.61.0-llvm_selectInterleaveCount.patch b/dev-lang/rust/files/1.61.0-llvm_selectInterleaveCount.patch new file mode 100644 index 000000000000..71a4e8df75d8 --- /dev/null +++ b/dev-lang/rust/files/1.61.0-llvm_selectInterleaveCount.patch @@ -0,0 +1,66 @@ +From fe8a27acd716a42667f5a572f52f2b04636010ff Mon Sep 17 00:00:00 2001 +From: Florian Hahn +Date: Tue, 29 Mar 2022 22:52:42 +0100 +Subject: [PATCH] [LV] Handle zero cost loops in selectInterleaveCount. + +In some case, like in the added test case, we can reach +selectInterleaveCount with loops that actually have a cost of 0. + +Unfortunately a loop cost of 0 is also used to communicate that the cost +has not been computed yet. To resolve the crash, bail out if the cost +remains zero after computing it. + +This seems like the best option, as there are multiple code paths that +return a cost of 0 to force a computation in selectInterleaveCount. +Computing the cost at multiple places up front there would unnecessarily +complicate the logic. + +Fixes #54413. + +(cherry picked from commit ecb4171dcbf1b433c9963fd605a74898303e850d) +--- + .../Transforms/Vectorize/LoopVectorize.cpp | 22 ++++---- + ...ct-interleave-count-loop-with-cost-zero.ll | 50 +++++++++++++++++++ + 2 files changed, 62 insertions(+), 10 deletions(-) + create mode 100644 llvm/test/Transforms/LoopVectorize/X86/pr54413-select-interleave-count-loop-with-cost-zero.ll + +diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +index 21c16f07e237..e1cc7946073e 100644 +--- a/src/llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp ++++ b/src/llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +@@ -6035,6 +6035,18 @@ unsigned LoopVectorizationCostModel::selectInterleaveCount(ElementCount VF, + !(InterleaveSmallLoopScalarReduction && HasReductions && VF.isScalar())) + return 1; + ++ // If we did not calculate the cost for VF (because the user selected the VF) ++ // then we calculate the cost of VF here. ++ if (LoopCost == 0) { ++ InstructionCost C = expectedCost(VF).first; ++ assert(C.isValid() && "Expected to have chosen a VF with valid cost"); ++ LoopCost = *C.getValue(); ++ ++ // Loop body is free and there is no need for interleaving. ++ if (LoopCost == 0) ++ return 1; ++ } ++ + RegisterUsage R = calculateRegisterUsage({VF})[0]; + // We divide by these constants so assume that we have at least one + // instruction that uses at least one register. +@@ -6126,16 +6138,6 @@ unsigned LoopVectorizationCostModel::selectInterleaveCount(ElementCount VF, + + assert(IC > 0 && "Interleave count must be greater than 0."); + +- // If we did not calculate the cost for VF (because the user selected the VF) +- // then we calculate the cost of VF here. +- if (LoopCost == 0) { +- InstructionCost C = expectedCost(VF).first; +- assert(C.isValid() && "Expected to have chosen a VF with valid cost"); +- LoopCost = *C.getValue(); +- } +- +- assert(LoopCost && "Non-zero loop cost expected"); +- + // Interleave if we vectorized this loop and there is a reduction that could + // benefit from interleaving. + if (VF.isVector() && HasReductions) { diff --git a/dev-lang/rust/files/1.61.0-miri-cow.patch b/dev-lang/rust/files/1.61.0-miri-cow.patch new file mode 100644 index 000000000000..fc469731e4f7 --- /dev/null +++ b/dev-lang/rust/files/1.61.0-miri-cow.patch @@ -0,0 +1,98 @@ +From 830cc58f8a10598f4caa337ca97be51741945499 Mon Sep 17 00:00:00 2001 +From: Ralf Jung +Date: Sun, 3 Apr 2022 20:00:03 -0400 +Subject: [PATCH] rustup + +gyakovlev: changed paths and removed irrelevant bits +--- + rust-version | 2 +- + src/helpers.rs | 4 ++-- + src/machine.rs | 2 +- + src/shims/env.rs | 2 +- + src/shims/foreign_items.rs | 4 ++-- + src/shims/posix/foreign_items.rs | 2 +- + 6 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/src/helpers.rs b/src/helpers.rs +index 3ffb983aa..7a63bb03d 100644 +--- a/src/tools/miri/src/helpers.rs ++++ b/src/tools/miri/src/helpers.rs +@@ -510,7 +510,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx + let this = self.eval_context_mut(); + let target = &this.tcx.sess.target; + let target_os = &target.os; +- let last_error = if target.families.contains(&"unix".to_owned()) { ++ let last_error = if target.families.iter().any(|f| f == "unix") { + this.eval_libc(match err_kind { + ConnectionRefused => "ECONNREFUSED", + ConnectionReset => "ECONNRESET", +@@ -534,7 +534,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx + ) + } + })? +- } else if target.families.contains(&"windows".to_owned()) { ++ } else if target.families.iter().any(|f| f == "windows") { + // FIXME: we have to finish implementing the Windows equivalent of this. + this.eval_windows( + "c", +diff --git a/src/machine.rs b/src/machine.rs +index e9ed50724..b4b07a61a 100644 +--- a/src/tools/miri/src/machine.rs ++++ b/src/tools/miri/src/machine.rs +@@ -227,7 +227,7 @@ impl MemoryExtra { + pub fn init_extern_statics<'tcx, 'mir>( + this: &mut MiriEvalContext<'mir, 'tcx>, + ) -> InterpResult<'tcx> { +- match this.tcx.sess.target.os.as_str() { ++ match this.tcx.sess.target.os.as_ref() { + "linux" => { + // "environ" + Self::add_extern_static( +diff --git a/src/shims/env.rs b/src/shims/env.rs +index c2050647a..822bef56c 100644 +--- a/src/tools/miri/src/shims/env.rs ++++ b/src/src/tools/miri/shims/env.rs +@@ -41,7 +41,7 @@ impl<'tcx> EnvVars<'tcx> { + mut excluded_env_vars: Vec, + forwarded_env_vars: Vec, + ) -> InterpResult<'tcx> { +- let target_os = ecx.tcx.sess.target.os.as_str(); ++ let target_os = ecx.tcx.sess.target.os.as_ref(); + // HACK: Exclude `TERM` var to avoid terminfo trying to open the termcap file. + // This is (a) very slow and (b) does not work on Windows. + excluded_env_vars.push("TERM".to_owned()); +diff --git a/src/shims/foreign_items.rs b/src/shims/foreign_items.rs +index ecffd310d..d9e4d9382 100644 +--- a/src/tools/miri/src/shims/foreign_items.rs ++++ b/src/tools/miri/src/shims/foreign_items.rs +@@ -46,7 +46,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx + fn min_align(&self, size: u64, kind: MiriMemoryKind) -> Align { + let this = self.eval_context_ref(); + // List taken from `libstd/sys_common/alloc.rs`. +- let min_align = match this.tcx.sess.target.arch.as_str() { ++ let min_align = match this.tcx.sess.target.arch.as_ref() { + "x86" | "arm" | "mips" | "powerpc" | "powerpc64" | "asmjs" | "wasm32" => 8, + "x86_64" | "aarch64" | "mips64" | "s390x" | "sparc64" => 16, + arch => bug!("Unsupported target architecture: {}", arch), +@@ -695,7 +695,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx + } + + // Platform-specific shims +- _ => match this.tcx.sess.target.os.as_str() { ++ _ => match this.tcx.sess.target.os.as_ref() { + "linux" | "macos" => return shims::posix::foreign_items::EvalContextExt::emulate_foreign_item_by_name(this, link_name, abi, args, dest, ret), + "windows" => return shims::windows::foreign_items::EvalContextExt::emulate_foreign_item_by_name(this, link_name, abi, args, dest, ret), + target => throw_unsup_format!("the target `{}` is not supported", target), +diff --git a/src/shims/posix/foreign_items.rs b/src/shims/posix/foreign_items.rs +index 02fb7089c..36bf53059 100644 +--- a/src/tools/miri/src/shims/posix/foreign_items.rs ++++ b/src/tools/miri/src/shims/posix/foreign_items.rs +@@ -462,7 +462,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriEvalContextExt<'mir, 'tcx + + // Platform-specific shims + _ => { +- match this.tcx.sess.target.os.as_str() { ++ match this.tcx.sess.target.os.as_ref() { + "linux" => return shims::posix::linux::foreign_items::EvalContextExt::emulate_foreign_item_by_name(this, link_name, abi, args, dest, ret), + "macos" => return shims::posix::macos::foreign_items::EvalContextExt::emulate_foreign_item_by_name(this, link_name, abi, args, dest, ret), + _ => unreachable!(), -- cgit v1.2.3